Process Engineer 3

Lam Research•Albany, NY

About The Position

The Process Engineer works in Lam Research’s Office of the CTO, contributing to development of semiconductor processes and equipment. The role involves research, development, and evaluation of processes; improving fabrication techniques; developing processes intended to reduce production costs and increase yields; and analyzing test data to guide process development and establish process specifications. The engineer supports customer demonstrations, next-generation product development, and the semiconductor roadmap, and provides guidance to process technicians. In this role, the engineer contributes directly to deposition process development for sub-2 nm CMOS logic nodes. Responsibilities include leading thin-film deposition process development projects (CVD, ALD, and plating) in support of Lam joint development agreements with IBM; working with customer process and hardware engineers to develop solutions and troubleshoot process and hardware interactions; and collaborating with customers to understand technology roadmaps, process flows, requirements, inflection points, and business challenges. The engineer may be cross-trained in dry etch, wet clean, and process integration, and presents results to internal and external audiences, including engineers, executives, and customers.

Requirements

  • Master’s degree in Materials Science, Chemical Engineering, Chemistry, Physics, or a related field, with at least 6 years of experience; or a PhD with at least 3 years of experience; or equivalent experience.
  • Familiarity with laboratory work and semiconductor equipment, including surface preparation and analytical techniques.
  • In-depth understanding of Statistical Process Control (SPC) and/or Design of Experiments (DOE).
  • High proficiency in MATLAB, Python, or a similar scientific computing language.
  • Working knowledge of statistical analysis and problem-solving methodologies.
  • Experience with statistical tools such as JMP or Minitab.
  • Background in semiconductor process design, deposition, or etch, including dielectric or conductor and metal films.

Nice To Haves

  • Background in Atomic Layer Deposition (ALD), Chemical Vapor Deposition (CVD), Plasma Enhanced Chemical Vapor Deposition (PECVD), or Physical Vapor Deposition (PVD).
  • Background in plasma physics, Reactive Ion Etching (RIE), Atomic Layer Etching (ALE), Inductively Coupled Plasma (ICP), or Capacitively Coupled Plasma (CCP).
  • Knowledge of material synthesis and material characterization.
  • Experience working collaboratively in a matrixed environment with diverse teams, semiconductor customers, and/or partners.

Responsibilities

  • Conduct process engineering research, development, and evaluation for semiconductor equipment and systems.
  • Review and enhance processing techniques and methods used in product manufacture and fabrication.
  • Develop and sustain processes and process improvements to reduce production costs and increase yields.
  • Compile and analyze test data to guide process development and establish appropriate process specification limits and variables.
  • Plan customer demonstrations, collect data, analyze results, and report on existing process applications.
  • Partner with internal teams and customers to understand roadmaps, process flows, inflection points, requirements, and business challenges.
  • Contribute to next-generation product development and release activities supporting the semiconductor roadmap.
  • Provide leadership, direction, and guidance to process technicians.
  • Lead thin-film deposition process development projects involving CVD, ALD, and plating in support of Lam joint development agreements with IBM.
  • Collaborate with customer process engineers to develop solutions.
  • Work with customer process and hardware engineers to troubleshoot hardware and process problems and interactions.
  • Be flexible to cross-train in dry etch, wet clean, and process integration.
  • Develop creative solutions in process design and applications.
  • Present results internally and externally to engineers, executives, customers, and other audiences.

Benefits

  • Comprehensive set of benefits; specific benefits are not detailed in the posting.
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