In this position, the individual will be responsible for designing, developing, modifying and evaluating chip architecture and Core circuit structures for feasibility study of high performance NAND flash, including new, most advanced 3-dimentional NAND memories. Design and conduct analysis on memory core circuits such as Row/Column drivers, decoder, sense amplifier, etc. Perform mixed/analog design to implement core operation supporting circuit design which is the interface circuit for core operation. Validate design performance and functionalities by running block and chip level simulations using industry standard integrated circuit (IC) tools such as Cadence design environment, HSPICE/FINESIM, UNIX. Supervise layout work, support verification, and silicon bring up throughout design cycle. Conceive new concepts and approaches in memory core design, architecture, and operation algorithm for best performing NAND device.
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Job Type
Full-time
Career Level
Principal