Principal Test Engineer, Test Architecture

Renesas Electronics•San Jose, CA

2h•$190,500 - $238,000•Onsite

About The Position

Renesas is seeking a Principal Test Architect for our Analog and Mixed-Signal division. The Test Architecture team provides technical leadership for semiconductor test methodology, design-for-test strategy, test infrastructure, and process optimization across Renesas' analog and mixed-signal product portfolio. This role partners closely with design, product, and test engineering teams to drive test innovation from new product introduction through high-volume manufacturing.

Requirements

BS or MS in Electrical Engineering, Physics, or a related technical discipline with 10+ years of experience in semiconductor test engineering or a closely related field.
Extensive Automatic Test Equipment (ATE) development experience and proven track record developing production test solutions on platforms such as Advantest 93K, ETS, Teradyne FLEX, Diamondx, LTX, SPEA, or similar systems.
Experience designing test hardware and software for mixed-signal test solutions, including both test hardware and software for wafer sort and final test.
Experience with all aspects of new product introduction, from customer samples and qualification to characterization and production test systems.
Experience testing analog, mixed-signal, data converter, power management, and related semiconductor devices.
Familiarity with digital interfaces, memory technologies.
Thorough understanding of electrical engineering principles.

Nice To Haves

Candidates with backgrounds in product engineering, characterization, silicon validation, applications engineering, or analog/mixed-signal IC design and significant test development experience will also be considered.
The theory of operation of these products is highly desirable.
Experience with analog or mixed-signal IC design and related development tools a plus but not required.

Responsibilities

Define and drive test architecture, methodology, and innovation for analog and mixed-signal semiconductor products.
Partner with IC design, product engineering, and test engineering teams to establish design-for-test (DFT) requirements and optimize product testability.
Architect and optimize mixed-signal test hardware and software solutions to improve test quality, throughput, cost, and manufacturability.
Evaluate and influence tester roadmap, test methodologies, and process improvements across the organization.
Provide technical leadership and mentorship on test strategies, best practices, and problem-solving for complex semiconductor products.