Principal System Diagnostics Engineer

Marvell Technology • Santa Clara, CA

8h • $150,680 - $225,700

About The Position

As a Hardware and Silicon Validation Principal Engineer at Marvell, you will help deliver high bandwidth over long distances. The team performs analog validation on amplifiers that drive optical electronic devices and receivers, validates silicon photonics, performs upper electronic measurements, and supports the coherent digital signal programming unit. This role focuses on developing diagnostics and validating network switch hardware, working with cutting-edge technologies used by internal and external customers around the world.

Requirements

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field and 10–15 years of related professional experience; or a master's degree in a related technical field and 5–10 years of experience.
• Proficiency in C/C++ for embedded or low-level software development, and strong Python or Bash scripting skills for automation.
• Solid understanding of switch architecture, high-speed signal integrity, SerDes, I2C/SPI/MDIO protocols, PCIe, and peripheral management.
• Experience developing in Linux environments, including knowledge of Linux drivers, kernel concepts, and memory mapping.
• Hands-on experience with oscilloscopes, logic analyzers, and JTAG debuggers to isolate hardware and software bugs.
• Knowledge of U-Boot and Open Network Install Environment (ONIE).
• Exposure to rack-scale management technologies such as BMC (OpenBMC), PDU, IPMI, or Redfish.
• Experience with continuous integration (CI/CD) pipelines and automated test infrastructure.
• Proven experience managing test relationships with ODM/JDM or CM partners.
• Strong analytical, problem-solving, and debugging skills, with urgency and accountability.

Nice To Haves

• Experience with networking ASICs or switch silicon from vendors such as Broadcom, Marvell, or Intel (Barefoot).
• Familiarity with networking protocols (Ethernet, TCP/IP, Layer 2/3 switching) and optical transceivers.

Responsibilities

• Design and implement low-level diagnostic software, test suites, and APIs to exercise and validate network switch hardware components.
• Develop test plans to verify ASICs, high-speed SerDes, memory interfaces (DDR/HBM), PCIe buses, power management, and thermal control systems.
• Partner with hardware design and silicon teams during initial board bring-up, debugging early prototype hardware and isolating root-cause issues.
• Deliver diagnostic test coverage for integration into factory manufacturing lines to support production quality.
• Build automated testing frameworks and scripts to execute diagnostic software, collect metrics, and analyze failure data.
• Work with Hardware Engineering, ASIC Design, Embedded Firmware, and Network OS teams to define diagnostic requirements and hardware-testability (DFT) hooks.
• Mentor junior engineers in diagnostic software development and hardware debugging, and provide technical guidance.
• Identify hardware-testability and production-readiness risks across the platform stack, develop mitigation strategies, and escalate issues to drive resolution.
• Manage test relationships with ODM/JDM or CM partners.

Benefits

• Eligible to participate in bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
• Employee stock purchase plan with a 2-year look back.
• Family support programs.
• Mental health resources.
• Recognition and service awards.

What This Job Offers

• Job Type: Full-time
• Career Level: Senior