Principal Engineer, System Diagnostics

Marvell Technology•Santa Clara, CA
•$150,680 - $225,700

About The Position

Marvell is seeking a senior-level System Diagnostic Engineer for its Platform Engineering team, supporting board, switch, and optics development for next-generation network switch platforms. The role drives execution across complex, cross-functional programs in AI, wired and wireless communications, and critical infrastructure. It designs and implements diagnostic software that connects hardware and software, validating switching hardware from low-level silicon interfaces through system-level routing paths during prototyping, manufacturing, and deployment. The position also provides hardware bring-up support and lab-based validation, collaborating with engineering teams to help meet platform performance, quality, and schedule objectives.

Requirements

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field and 10–15 years of related professional experience; alternatively, a master's degree in a related technical field and 5–10 years of experience.
  • Proficiency in C/C++ for embedded or low-level software development and strong scripting skills in Python or Bash for automation.
  • Solid understanding of switch architecture, high-speed signal integrity, SerDes, I2C/SPI/MDIO protocols, PCIe, and peripheral management.
  • Experience developing in Linux environments, including knowledge of Linux drivers, kernel concepts, and memory mapping.
  • Hands-on experience using oscilloscopes, logic analyzers, and JTAG debuggers to isolate hardware and software bugs.
  • Strong analytical, problem-solving, and debugging skills, with urgency and accountability.
  • Proven experience managing test relationships with ODM/JDM or contract manufacturing partners.

Nice To Haves

  • Experience with networking ASICs or switch silicon from vendors such as Broadcom, Marvell, or Intel (Barefoot).
  • Familiarity with networking protocols, including Ethernet, TCP/IP, Layer 2/3 switching, and optical transceivers.
  • Knowledge of U-Boot and Open Network Install Environment (ONIE).
  • Exposure to rack-scale management technologies such as BMC (OpenBMC), PDU, IPMI, or Redfish.
  • Experience with CI/CD pipelines and automated test infrastructure.

Responsibilities

  • Design and implement low-level diagnostic software, test suites, and APIs to exercise and validate network switch hardware components.
  • Develop test plans for ASICs, high-speed SerDes, memory interfaces such as DDR/HBM, PCIe buses, power management, and thermal control systems.
  • Partner with hardware design and silicon teams during initial board bring-up, debug prototype hardware, and isolate root causes.
  • Deliver diagnostic test coverage for integration into factory manufacturing lines.
  • Build automated testing frameworks and scripts to run diagnostic software, collect metrics, and analyze failure data.
  • Collaborate with Hardware Engineering, ASIC Design, Embedded Firmware, and Network OS teams to define diagnostic requirements and hardware-testability hooks.
  • Mentor junior engineers in diagnostic software development and hardware debugging, and provide technical guidance.
  • Identify hardware-testability and production-readiness risks, develop mitigation strategies, and escalate issues to drive resolution.

Benefits

  • Eligible to participate in bonus and equity plans, including a new-hire equity grant and annual equity refreshers.
  • Employee stock purchase plan with a 2-year look back.
  • Family support programs.
  • Mental health resources.
  • Recognition and service awards.
© 2026 Teal Labs, Inc
Privacy PolicyTerms of Service