Principal SoC Verification

Marvell Technology•San Diego, CA

1d•$184,400 - $272,950

About The Position

Join Marvell's Custom Compute Solutions Business Unit (CCSBU) as we establish our design presence in San Diego's thriving semiconductor ecosystem. This team will be responsible for delivering high-quality customer silicon for advanced AI, XPU, and XPU-Attach programs. By partnering closely with customers and internal stakeholders, the design center will enable Marvell’s most strategic and financially significant custom SoC initiatives, delivering differentiated solutions that reinforce Marvell’s position as a trusted partner for next-generation compute platforms. This is a rare foundational opportunity - you'll help shape verification strategy and help build a world-class team as part of our strategic expansion into Southern California. You're not joining an established local team - you're contributing to building one. You'll define the culture, establish the methodology, and shape the technical DNA of Marvell's San Diego design verification organization. In this role, you will develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers and contribute to the methodology behind such development. Writing a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete. Developing tests and tuning the environment to achieve coverage goals. Debugging failures and working with designers to resolve issues. Verifying boot code and architecting, developing, and maintaining tools to streamline the design of state-of-the-art multi-core SoCs. Transforming the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment. Unit and regression testing of software tools.

Requirements

BS Computer Engineering, Electrical Engineering, or Computer Science with 10-15+ years of verification and firmware and software development experience (or MS/PhD with 5-10+ years experience).
Strong background in SoC verification and test bench development using UVM, System Verilog, C/C++, and DPI.
Strong verification skills, understanding of methodology (object oriented programming, white-box/black-box, directed/random testing, coverage, gate-level simulations, data structure).
Effective interpersonal and teamwork skills.
Ability to participate in problem solving and quality improvement activities.
Demonstrate initiative and a bias for thoughtful action.
Grounded, detail-oriented, always backs up ideas with facts.
Ability to define problems, issues and opportunities, analyze data, establish facts, and draw valid conclusions from various datasets.
Must be eligible to access export-controlled information as defined under applicable law.

Responsibilities

Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers.
Contribute to the methodology behind such development.
Write a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete.
Develop tests and tune the environment to achieve coverage goals.
Debug failures and work with designers to resolve issues.
Verify boot code.
Architect, develop, and maintain tools to streamline the design of state-of-the-art multi-core SoCs.
Transform the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment.
Perform unit and regression testing of software tools.