SOC Design Verification Engineer

Intel Corporation•Hillsboro, OR

1d•Hybrid

About The Position

Come join Intel's Devices Development Group, responsible for creating leading Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for a SOC Design Verification Engineer, ready to research, design, develop, and test Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology.

Requirements

Must have either a BS + 3 years' experience or MS + 2 years of experience in Computer Science, Computer Engineering or Electrical Engineering
Minimum 2 years of experience with reading and interpreting technical specs and Register Transfer Level (RTL) code
Minimum 2 years of experience working on IP or SoC development, verification, or integration using Verilog/SystemVerilog and OVM/UVM
Minimum 2 years of experience with writing validation plans and software to implement those validation plans
Minimum 2 years of experience with an object-oriented programming language
Minimum 2 years of experience with Verilog or other HDL
Minimum 1 year of experience with UNIX or Linux

Nice To Haves

1 years of experience with computer architecture
3 years of experience with validation or testing experience, especially in a silicon design team

Responsibilities

Validation of an IP or feature at the system or subsystem level
Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide
Learning the architecture and microarchitecture by debugging failures to the root cause
Developing and utilizing various debug and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
Engaging with IP providers and customers to define, develop and deliver necessary infrastructure and address issues found during execution
Developing tools and methods to streamline IP development and SOC integration to deliver highest quality in shortest time possible
Developing debugging tools and software