Principal Signal Integrity Engineer

FormFactor Inc.•Livermore, CA

22h•$110,700 - $145,320•Onsite

About The Position

In the role of Principal Signal Integrity Engineer, you will be responsible for completing tasks on time and solving short- and long-term problems. You will be part of a technical group, responsible for improving SI/PI performance, completing production design analysis, and measurement and characterizing. This role will be working with customers and engineers across multiple sites, California US, Europe and Asia Regions.

Requirements

BS/MS in Electrical Engineering (or related field).
4+ years of relevant experience in SI/PI analysis and design.
Strong understanding of Transmission line theory, Power integrity principles, and Crosstalk and signal degradation mechanisms
Experience with tools such as HFSS, ADS, SIwave, PowerSI, PowerDC, SPICE, Allegro, MATLAB.
Hands-on experience with measurement tools (VNA, TDR/TDT).
Experience with high-speed interfaces (PAM4, SerDes, PCIe, HBM).
Scripting/automation (Python, MATLAB).
Experience in advanced packaging, probe cards, or fine-pitch interconnects.
Allegro PCB Designer
ANSYS HFSS
Cadence Tools
High Speed Interfaces
MATLAB
Power Distribution Design
Power Integrity
PSpice Circuit Simulation
Python (Programming Language)
SERDES
Signal Integrity
Signal Integrity Analysis
Transmission Line Design
Minimum of 5 years of related experience with a Bachelor’s degree; or 3 years and a Master’s degree; or a PhD without experience; or equivalent work

Responsibilities

Perform signal and power integrity analysis for high‑speed interconnects (PCB, package, MLO, probe card).
Develop and validate electrical models for Transmission lines, vias, connectors, and PDN (Power Distribution Network) structure.
Define stack‑ups, impedance targets, and routing constraints.
Evaluate and optimize Reflections, insertion/return loss, and Crosstalk and jitter performance.
Use EM and circuit tools (e.g., HFSS, ADS, SIwave, PowerSI) for Frequency‑domain and time‑domain analysis.
Build system/channel models (e.g., IBIS‑AMI, eye diagrams).
Run what‑if studies to optimize performance and reduce design risk.
Define and execute SI validation plans using VNA, TDR, TDT and high‑speed measurement setups.
Define test fixtures and correlation structures.
Drive simulation-to-measurement correlation and root cause analysis.
Drive design improvements based on measured data.
Provide design guidelines, constraints, and best practices to layout teams and electrical design engineers.
Collaborate globally with engineering teams and customers.
Support new product development programs (e.g., probe cards, load boards).
Improve modeling methodologies and design workflows.
Reduce simulation cycle time and improve design quality.
Stay current with High-speed interfaces (PCIe, HBM, SerDes), and Emerging packaging and interconnect technologies.
Contribute to next-generation architecture and roadmap development.