PRINICPAL RTL DESIGN

Micron Technology • Boise, ID

6d • Onsite

About The Position

Micron Technology is seeking a Principal RTL Design Engineer to lead the development of high-quality DRAM digital and mixed-signal IP. In this role, you will be responsible for the full RTL design lifecycle—from architecture and implementation through signoff—while delivering designs that meet aggressive power, performance, and area (PPA) targets. This position is in Boise, Idaho, offering strong opportunities for technical leadership, innovation, and collaboration across global teams.

Requirements

• Master’s degree in Electrical Engineering with 8+ years of experience, or Bachelor’s degree with 10+ years of pre-silicon RTL design experience.
• Proven ownership of complex RTL/IP development from micro-architecture definition through handoff to physical design.
• Strong experience with ASIC low-power design methodologies, including UPF-based power intent and power-aware CDC/RDC.
• In-depth knowledge of RTL design, logic synthesis, functional verification, and static timing analysis (STA).
• Proficiency in Verilog/SystemVerilog and industry-standard simulation and front-end tools.

Nice To Haves

• Extensive background in DRAM or other memory compose architectures and development.
• Deep knowledge of CDC, RDC, STA, and low-power techniques in advanced ASIC technology nodes.
• Experience designing complex digital logic and/or mixed-signal-interfacing circuits.
• Familiarity with CMOS digital and analog-integrated circuit concepts and their system-level impact.
• Excellent interpersonal skills with the ability to influence multi-functional teams and technical leadership.

Responsibilities

• Own and drive RTL design for DRAM digital and mixed-signal IP from specification through silicon-ready signoff.
• Architect and deliver high-performance, power- and area-efficient RTL designs aligned with product requirements.
• Perform and sign off front-end quality checks, including lint, CDC/RDC, synthesis, UPF, and timing QoR.
• Collaborate closely with physical design, verification, and architecture teams to achieve timing closure and PPA goals.
• Improve design quality and efficiency by refining methodologies, driving automation, and enhancing RTL design flows.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal