Principal RFIC Design Engineer

Western Digital • San Jose, CA

7d

About The Position

At WD, our vision is to power global innovation and push the boundaries of technology to make what you thought was once impossible, possible. At our core, WD is a company of problem solvers. People achieve extraordinary things given the right technology. For decades, we’ve been doing just that—our technology helped people put a man on the moon and capture the first-ever picture of a black hole. We offer an expansive portfolio of technologies, HDDs, and platforms for business, creative professionals, and consumers alike under our Western Digital®, WD®, and WD_BLACK™. We are a key partner to some of the largest and highest-growth organizations in the world. From enabling systems to make cities safer and more connected, to powering the data centers behind many of the world’s biggest companies and hyperscale cloud providers, to meeting the massive and ever-growing data storage needs of the AI era, WD is fueling a brighter, smarter future. Today’s exceptional challenges require your unique skills. Together, we can build the future of data storage.

Requirements

• Hands-on design and development experience in analog and mixed-signal integrated circuit.
• Experience in at least one preferably multiple area of full CMOS circuit design and development in: Amplifiers – operational, instrumentation, wide-bandwidth etc.
• PMIC – Linear and switched regulators, Low-drop out regulators etc.
• Data converters – ADC, DAC, Flash and SAR type.
• Experience in 40nm and below CMOS technology.
• Demonstrable track record of successful design releases and mass production.
• Thorough knowledge of industry standard EDA tools (Cadence, Mentor, Siemens, Ansys etc.).
• Experience with analog layout techniques of mismatch reduction, gradient suppression, parasitic effects minimization.
• Experience with floor planning, block level routing and top level chip routing.
• Knowledge of high performance and deep CMOS analog reliability considerations such as EM-IR, SOA and VDR and relevant mitigation techniques.
• Functional knowledge of logic digital circuits and understanding of basic digital design flow.
• BSEE with minimum 10+ years of experience.
• MSEE with minimum 8+ years of experience.
• PhD with minimum 4+ years of experience.

Nice To Haves

• Experience working with distributed design teams a plus.

Responsibilities

• Design of high performance analog and mixed-signal circuit blocks.
• Transistor level, block level and module level circuit architecture, design, simulation, optimization, layout supervision, layout verification, preparation of test plan for the test group, product characterization, reliability and yield assessment and modeling, simulation to bench and bench to test correlation, bench evaluation both at silicon level and at applications level, and documentation.
• Communicate at all levels and with cross functional groups.
• Demonstrated track record of circuit innovation.
• Be a team player, be adaptable, and accept constructive criticism.

Benefits

• Paid vacation time
• Paid sick leave
• Medical/dental/vision insurance
• Life, accident and disability insurance
• Tax-advantaged flexible spending and health savings accounts
• Employee assistance program
• Other voluntary benefit programs such as supplemental life and AD&D, legal plan, pet insurance, critical illness, accident and hospital indemnity
• Tuition reimbursement
• Transit
• The Applause Program
• Employee stock purchase plan
• WD Savings 401(k) Plan

What This Job Offers

• Job Type: Full-time
• Career Level: Principal