Principal RFIC Design Engineer - Chip Lead

Oso Semiconductor•Mountain View, CA

About The Position

We’re looking for a Principal RFIC Design Engineer - Chip Lead to own top-level integration of our next-generation multi-channel beamformer ICs. You’ll drive chip architecture, floorplanning, block integration, top-level RF/analog performance, physical implementation, package interfaces, and tapeout readiness across RF, analog, digital, layout, and test functions. This is a senior technical leadership role for an experienced IC designer who can see the whole chip. You’ll work directly with the founding engineers and block owners to turn system requirements into a manufacturable, testable product and drive execution from architecture and floorplan through sign-off, silicon bring-up, and customer deployment.

Requirements

Experienced IC designer
Ability to see the whole chip
Experience with RFIC design
Experience with chip architecture
Experience with floorplanning
Experience with block integration
Experience with top-level RF/analog performance
Experience with physical implementation
Experience with package interfaces
Experience with tapeout readiness
Experience with RF, analog, digital, layout, and test functions
Experience working with founding engineers and block owners
Experience driving execution from architecture and floorplan through sign-off, silicon bring-up, and customer deployment.

Responsibilities

Own top-level integration of next-generation multi-channel beamformer ICs.
Drive chip architecture, floorplanning, block integration, top-level RF/analog performance, physical implementation, package interfaces, and tapeout readiness across RF, analog, digital, layout, and test functions.
Turn system requirements into a manufacturable, testable product.
Drive execution from architecture and floorplan through sign-off, silicon bring-up, and customer deployment.

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