Senior/Principal Full-Chip Physical Verification Engineer Key Responsibilities Team & Project Leadership Lead full chip Physical Verification effort Own execution plans, schedules for full-chip Drive accountability for quality, milestones, and tapeout readiness. Conduct full chip and blocks PV checks Physical Verification Ownership Ownership of full chip verification Work with internal analog team to ensure clean IP delivery Responsible for running and analyzing DRC/ERC/LUP/PERC results Experience with using either ICV or Calibre verification tools Understanding advance TSMC DRC rules Cross-Functional Collaboration Partner with analog, block, chip top owners to ensure clean floorplan Provide early guidance on corner case requirements Influence floorplan constraints, hierarchy, and implementation strategy Participate in tapeout readiness reviews
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Job Type
Full-time
Career Level
Senior