R&D Engineer Hardware 4

Broadcom • Chandler, AZ

23h • $109,700 - $175,500

About The Position

Broadcom is seeking a semiconductor professional to predict wafer-level yield and optimize power, performance, and area (PPA) using SoC telemetry and volume ATE production test data. The role analyzes silicon architecture, static timing analysis (STA), and silicon telemetry using advanced data analysis tools to develop predictive yield and performance optimization tool sets. The engineer designs and deploys machine learning (ML), deep learning (DL), and generative AI (GenAI) tools that translate silicon data into actionable optimization strategies.

Requirements

• MS degree plus 6 years of experience, or Ph.D. plus 3 years of experience, in Electrical Engineering, Computer Science, or a related field.
• Proven semiconductor-industry track record specializing in silicon macro characterization and SoC telemetry analysis.
• Deep expertise applying machine learning and artificial intelligence techniques, such as deep learning, anomaly detection, and multivariate regression, to physical hardware datasets.
• Strong programming skills in Python, R, or C++ and hands-on experience handling massive databases.
• Deep understanding of semiconductor manufacturing processes, wafer fabrication, DFM practices, and EDA tools.
• Experience with spice modeling tools and Cadence Virtuoso, and familiarity with Primetime STA tools.

Nice To Haves

• Education from a top-tier semiconductor research institution, such as Stanford, UC Berkeley, MIT, Purdue, or UIUC.

Responsibilities

• Design, build, and deploy ML, DL, and GenAI models to predict and maximize wafer-level yield using large-scale SoC telemetry data.
• Organize, clean, and analyze large, multi-source sensor databases and provide input on future telemetry requirements.
• Interpret complex parametric data, on-chip sensor readouts, and circuit telemetry to isolate failure mechanisms and marginalities.
• Partner with foundry, product engineering, design-for-manufacturing (DFM), and DFT engineering teams to drive yield and PPA strategies.
• Develop, qualify, and productize experimental data workflows, and work with teams to release them to scalable production.
• Use spice modeling tools and Cadence Virtuoso, with familiarity with Primetime STA tools.

Benefits

• Discretionary annual bonus
• Competitive new-hire equity grant and annual equity awards
• Medical, dental, and vision plans
• 401(k) participation with company matching
• Employee Stock Purchase Program (ESPP)
• Employee Assistance Program (EAP)
• Company-paid holidays
• Paid sick leave and vacation time
• Paid Family Leave and other leaves of absence in accordance with applicable laws

What This Job Offers

• Job Type: Full-time
• Career Level: Senior