Principal Hardware Software Engineer

Leidos•Annapolis Junction, MD
•$154,050 - $278,475

About The Position

Leidos has a new and exciting opportunity for a Principal Hardware/Software Design Engineer in our Intelligence Sector. Our talented team is at the forefront in Security Engineering, Computer Network Operations (CNO), Mission Software, Analytical Methods and Modeling, Signals Intelligence (SIGINT), and Cryptographic Key Management. Our program provides our customer's Signals Analysis organization with the best possible solutions for their mission needs. We achieve this through rapid prototyping, new development, and advanced technology research. From leading-edge visualizations to analytic development, we're always pushing the boundaries to find new and better data sources and tradecraft to answer intelligence questions. With a focus on collaboration and a fast-paced environment, our prototype development program is the ideal place to grow your skills and make a real impact. Seeking an experienced Principal HW/SW Design Engineer to join a small team to design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems. This position requires expertise in FPGA development, digital signal processing implementation, and software-hardware integration to support mission critical requirements. The contractor will lead technical design efforts, implement DSP algorithms and associated technical components in FPGA hardware, integrate with existing Linux code bases, bridge FPGA to software stack connection, plus document those efforts. This role combines hardware design responsibilities (FPGA RTL development, timing closure, resource optimization) with software development (integration code, system-level software) to deliver complete subsystem solutions.

Requirements

  • Bachelor's degree plus 8 years of relevant experience or equivalent
  • Active TS/SCI with Polygraph security clearance
  • Strong experience required for FPGA coding
  • Strong experience in Digital Signal Processing theory & application
  • Strong experience in Interfacing FPGA code with existing code bases and software
  • Knowledge of signal processing blocks and related DSP components
  • Knowledge of Linux OS
  • Coding ability in C and C++

Nice To Haves

  • Additional experience with Vivado required
  • Experience with Epiq Solution PDK preferred

Responsibilities

  • Lead technical design efforts
  • Implement DSP algorithms and associated technical components in FPGA hardware
  • Integrate with existing Linux code bases
  • Bridge FPGA to software stack connection
  • Document efforts
  • Design, develop, construct, and test electronic hardware (FPGA) and software processing components for subsystems supporting RF communication and collection systems
  • Implement DSP and associated technical components in FPGA for code base integration

Benefits

  • Paid Time Off
  • 11 paid Holidays
  • 401K with a 6% company match and immediate vesting
  • Flexible Schedules
  • Discounted Stock Purchase Plans
  • Technical Upskilling
  • Education and Training Support
  • Parental Paid Leave
  • up to a $25K cash sign on bonus or a paid time off bonus
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