Principal FPGA Digital Design Engineer - Signing Bonus
About The Position
BAE Systems, Countermeasure & Electromagnetic Attack Solutions (CEMA) has an open position for a Principal FPGA Digital Design Engineer! Our employees work on the world’s most advanced electronics – from detecting threats for F-35 pilots to illuminating the night for soldiers. Spanning air, land, sea, and space, we are developing the technology of tomorrow, delivered today. We are innovating for the future. And you can, too. Our flexible work environment provides you with a chance to change the world without giving up your personal life. We put our customers first – exemplified by our mission: “We Protect Those Who Protect Us®.” Come build your career with BAE Systems. At BAE Systems, we deliver a full range of products and services for air, land and naval forces, as well as advanced electronics, security, information technology solutions and customer support services. If you are an individual that enjoys a cohesive team environment and is interested in a variety of challenges across a variety of products, then we are interested in hearing from you! The Countermeasure & Electromagnetic Attack Solutions (CEMA) Hardware Engineering Group is looking for a Principal FPGA Digital Design Engineer to support FPGA designs through all phases of development. The ideal candidate is expected to perform activities including assisting in design architecture, ownership of RTL coding, synthesis, place and route, timing closure, basic test bench development, lab testing, product support and FPGA security.
Requirements
- Current Security Clearance (Secret), or eligible to obtain one
- 6+ years of relevant experience with bachelor’s degree (less with an advanced degree)
- Experience in FPGA or ASIC Design / Development
- VHDL (preferred) or Verilog HDL coding
- Familiarity with Xilinx Vivado or Intel/Altera Quartus
- Experience with internal logic analyzer (ILA/chipscope/signaltap)
- Digital simulation using Modelsim/Questa
- Experience with static timing analysis and timing closure
- Experience with clock domain crossing techniques
- Experience with high-speed interfaces like SERDES, PCIe, DDR2/3/4, LVDS
- Familiarity with revision control (GIT, CVS, Clearcase, Subversion, etc.)
- Experience generating scripts (Perl, Tcl, Python, shell, etc.)
- Strong debug and problem-solving skills
- Lab testing support
- Strong written and oral communication skills
- Self-starter and a good team player
- Ability to mentor and willingness to be mentored
Nice To Haves
- Experience with DSP fundamentals and FPGA implementation
- Experience with Matlab/Simulink
- Experience dealing with legacy designs
- Experience in hardware design and hands-on lab debug
- Working knowledge of UVM/SystemVerilog
- Working knowledge of Radar systems
- Working knowledge of Video/IR processing systems
- Working knowledge of stepper motor control
- Working knowledge of C/C++
Responsibilities
- Assisting in design architecture
- Ownership of RTL coding
- Synthesis
- Place and route
- Timing closure
- Basic test bench development
- Lab testing
- Product support
- FPGA security
Benefits
- health, dental, and vision insurance
- health savings accounts
- a 401(k) savings plan
- disability coverage
- life and accident insurance
- employee assistance program
- legal plan
- discounts on things like home, auto, and pet insurance
- paid time off
- paid holidays
- paid parental leave
- paid military leave
- paid bereavement leave
- applicable federal and state sick leave
- company recognition program
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What This Job Offers
Job Type
Full-time
Career Level
Principal
