Principal FPGA/ASIC Verification Engineer (Onsite)

RTX•Fort Wayne, IN

1d•$107,500 - $204,500•Onsite

About The Position

We are seeking an experienced and highly motivated Principal Electrical or Computer Engineer to lead the design, implementation, and verification of advanced testbenches for a portfolio of high-performance digital ASICs and FPGAs. In this role, you will drive the development of cutting-edge signal processing and information assurance technologies supporting critical Mission Systems programs as part of the Microelectronics Technology team. This candidate will be onsite based out of Fort Wayne, IN.

Requirements

Typically requires a degree in Science, Technology, Engineering or Mathematics (STEM) and minimum 8 years prior relevant experience or an Advanced Degree in a related field and minimum 5 years of experience
Active and transferable U.S. government issued security clearance is required prior to start date
U.S. citizenship is required, as only U.S. citizens are eligible for a security clearance
Demonstrated experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
At least 4+ years experience developing and simulating RTL designs using VHDL and/or Verilog in a professional FPGA or ASIC development environment.
Demonstrated ability to work independently and lead and/or mentor junior engineers within a team environment
Proven ability to design, implement, and execute verification testbenches for RTL blocks using VHDL and/or SystemVerilog.
4+ years of experience applying chip-level verification methodologies, including constrained-random testing, functional coverage analysis, and assertion-based verification (SystemVerilog)
Experience using revision control systems such as Git or Subversion to manage source code, collaborate across engineering teams, and maintain configuration integrity.

Nice To Haves

Experience with ASIC/FPGA lab validation and debug using standard lab equipment, along with familiarity with DFT, manufacturability, and production test concepts.
Proficiency with Unix/Linux environments, scripting or software development (C, C++, Python, Perl, or shell), and industry-standard ASIC/FPGA simulation and synthesis tools such as QuestaSim, Synplify, Quartus, or Vivado.
Strong written and verbal communication skills, with the ability to work independently and collaboratively in fast-paced, multidisciplinary engineering environments.

Responsibilities

Verification environment architecture and design using SystemVerilog with OVM/UVM
Creation of written test plan, testcases, code coverage tracking, and functional coverage tracking
Testbench development for the verification of RTL blocks using VHDL or SystemVerilog
Recommend new tools and practices for continuous improvement in the group's ASIC / FPGA verification flow
Contribute to engineering estimates for new program pursuits.
Provide technical leadership for project verification teams by breaking down work, planning activities, and reporting status

Benefits

Medical, dental, and vision insurance
Three weeks of vacation for newly hired employees
Generous 401(k) plan that includes employer matching funds and separate employer retirement contribution, including a Lifetime Income Strategy option
Tuition reimbursement program
Student Loan Repayment Program
Life insurance and disability coverage
Optional coverages you can buy pet insurance, home and auto insurance, additional life and accident insurance, critical illness insurance, group legal, ID theft protection
Birth, adoption, parental leave benefits
Ovia Health, fertility, and family planning
Adoption Assistance
Autism Benefit
Employee Assistance Program, including up to 10 free counseling sessions
Healthy You Incentives, wellness rewards program
Doctor on Demand, virtual doctor visits
Bright Horizons, child and elder care services
Teladoc Medical Experts, second opinion program
Relocation assistance