Principal Engineer, RET Design

Micron Technology • Boise, ID

2d

About The Position

The Advanced Mask Development team within Micron’s Technology Development organization delivers reticle solutions that help enable the next generation of memory and storage products. We work at the intersection of advanced lithography, materials science, and precision manufacturing to solve complex patterning challenges. If you enjoy collaborating with technical experts, driving innovation, and making a direct impact on product quality and technology advancement, you’ll find exciting opportunities here! As a Resolution Enhancement Techniques (RET) Engineer, you will help develop and optimize RET and Optical Proximity Correction (OPC) solutions that enable high-fidelity wafer patterning for advanced memory technologies. Depending on experience and qualifications, candidates may be considered for Principal, MTS, or SMTS-level roles. This position partners closely with teams across technology development and manufacturing to improve reticle solutions, enhance tapeout methodologies, and solve critical patterning challenges that support Micron’s technology roadmap.

Requirements

• Bachelor’s degree in Electrical Engineering, Materials Science, Physics, Chemical Engineering, or a related technical field, plus 6+ years of experience in RET, OPC, lithography, or mask development
• Experience developing and applying RET and OPC methodologies for semiconductor patterning challenges
• Strong understanding of EUV lithography, optics, diffraction, resist behavior, and advanced patterning techniques
• Experience with lithography simulation tools such as Sentaurus Litho, ProLith, or similar platforms
• Demonstrated ability to solve complex technical problems and collaborate effectively across multidisciplinary teams

Nice To Haves

• Master’s degree or PhD in Electrical Engineering, Materials Science, or a related field
• Experience with EDA tools such as Synopsys, Siemens, Cadence, Brion, or similar platforms for OPC modeling and lithography simulation
• Programming or scripting experience with Python, Perl, TCL, C, or C++
• Semiconductor process development or manufacturing experience
• Experience mentoring engineers and supporting technical growth and development of team members

Responsibilities

• Develop and implement RET and OPC solutions to improve pattern fidelity, manufacturability, and yield
• Optimize lithography methodologies, software capabilities, and tapeout processes to improve performance and efficiency
• Analyze patterning issues, identify root causes, and drive corrective actions across R&D and manufacturing environments
• Lead complex mask development and lithography optimization projects while collaborating across engineering teams
• Mentor engineers and promote technical best practices, knowledge sharing, and AI-enabled engineering approaches

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Principal