Principal Engineer - Layout

Microchip • Allentown, PA

3d • Onsite

About The Position

As a member of Microchip’s engineering community, the Principal Engineer – Layout will be responsible for leading and executing automated place-and-route activities from floorplanning through GDSII tapeout. This role will leverage advanced physical design expertise and automation capabilities to drive productivity improvements, optimize design flows, and develop physical design methodologies. The Principal Engineer will work closely with cross-functional engineering teams to solve complex physical design challenges, improve design quality and efficiency, and support successful project execution through design signoff and tapeout.

Requirements

• 10+ years of experience in automated place and route and physical design, with strong experience using industry-standard physical design tools and methodologies.
• Strong scripting and automation skills using Tcl (preferred), Perl, Python, and shell scripting, with demonstrated experience developing custom physical design utilities and methodology enhancements to improve efficiency and productivity.
• Experience developing automation solutions for timing and design closure, data extraction and analysis, QoR monitoring, ECO automation, and physical verification analysis.
• Extensive experience with physical design activities including floorplanning and partitioning, power planning and power integrity, placement and routing optimization, Clock Tree Synthesis (CTS), timing closure, signal integrity analysis, physical verification, ECO implementation, and design signoff, including LEC/CLP checks.
• Strong analytical and problem-solving skills with the ability to identify opportunities for flow optimization and methodology improvements.
• Excellent oral and written communication skills, with the ability to effectively collaborate across engineering teams.
• Self-motivated and proactive team player with the ability to work independently, manage priorities, and deliver results in accordance with project schedules and tapeout requirements.
• Candidates are required to provide proof of either US citizenship, Permanent US residency or classification as a protected individual as defined in 8 USC 1324b (a) (3).

Responsibilities

• Leading and executing automated place-and-route activities from floorplanning through GDSII tapeout.
• Leveraging advanced physical design expertise and automation capabilities to drive productivity improvements, optimize design flows, and develop physical design methodologies.
• Working closely with cross-functional engineering teams to solve complex physical design challenges, improve design quality and efficiency, and support successful project execution through design signoff and tapeout.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal
• Education Level: No Education Listed