Principal Engineer, ASIC Verification - AI/HPC

Marvell TechnologyToronto, ON
$145,800 - $194,400

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. This is an existing vacancy. Your Team, Your Impact Custom Silicon Engineering (CSE) group is part of Data Center Engineering (DCE) Business Unit, closely collaborates with strategic Hyper scalar and Data Center customers in the development of advanced and highly complex custom SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. What You Can Expect In this role, you will develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers and contribute to the methodology behind such development. Activities may include: • Writing a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete. • Developing tests and tuning the environment to achieve coverage goals. Debugging failures and working with designers to resolve issues. • Verifying boot code and architecting, developing, and maintaining tools to streamline the design of state-of-the-art multi-core SoCs. • Transforming the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment. • Unit and regression testing of software tools.

Requirements

  • BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
  • Experience with System Verilog, UVM.
  • Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
  • Experience with scripting language such as Python or Perl and EDA Verification tools.
  • Experience with Object-Oriented Design and implementation.
  • Good understanding of Linux O.S.
  • Good programming skills desired, especially C++ and ARM assembly.
  • Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision.
  • Ability to accept and work with differing opinions.
  • Must be able to learn on the fly and work in a fast-paced environment.

Nice To Haves

  • Understanding of networking protocols, a plus.

Responsibilities

  • Develop the architecture for a functional verification environment, including reference models and bus-functional monitors and drivers.
  • Contribute to the methodology behind such development.
  • Write a verification test plan using random techniques and coverage analysis and working with designers to ensure it is complete.
  • Develop tests and tune the environment to achieve coverage goals.
  • Debug failures and work with designers to resolve issues.
  • Verify boot code.
  • Architect, develop, and maintain tools to streamline the design of state-of-the-art multi-core SoCs.
  • Transform the requirements from the engineering teams into software tools that are both easy to use and scalable within a highly parallel compute environment.
  • Perform unit and regression testing of software tools.

Benefits

  • Competitive compensation
  • Great benefits
  • Workstyle within an environment of shared collaboration, transparency, and inclusivity.
  • Tools and resources they need to succeed in doing work that matters, and to grow and develop with us.
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