Principal Emulation Engineer

Marvell TechnologySanta Clara, CA

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Custom Compute and Storage (CCS) Business Unit closely collaborates with strategic customers in the development of advanced and highly complex SoCs, from architecture and design all the way through layout, packaging, prototype validation and production ramp up. The Emulation Center of Excellence (CoE) team is key part of this group, with global ownership and responsibility for delivering emulation infrastructure, validating the design on emulation and drive left shift of SW and post-silicon readiness for all of CCS products. As part of the Emulation CoE team, you will drive the emulation strategy, vendor platform enablement, testplan execution for a high-quality design tape-out.

Requirements

  • BS Computer Engineering, Electrical Engineering, or Computer Science with 10+ years of verification and firmware and software development experience (or MS/PhD with 5+ years experience).
  • Experience with System Verilog, UVM.
  • Experience with writing a detailed test plan and building a sophisticated, directed, random-verification environment.
  • Experience with scripting language such as Python or Perl and EDA Verification tools.
  • Experience with Object-Oriented Design and implementation.
  • Good understanding of Linux O.S.
  • Good programming skills desired, especially C++ and ARM assembly.
  • Understanding of networking protocols, a plus.
  • Diligent, detail-oriented, and willing to take initiative and handle assignments with minimal supervision.
  • Requires the ability to accept and work with differing opinions.
  • Cannot be a close-minded developer.
  • Must be able to learn on the fly and work in a fast-paced environment.

Nice To Haves

  • Understanding of networking protocols, a plus.

Responsibilities

  • Lead the development of complex SubSystem emulation models, including design integration, environment setup, compilation, and debug across industry‑leading platforms (e.g., Veloce, ZeBu, Palladium).
  • Drive emulation bring‑up activities, including clock/reset sequencing, firmware boot, and system validation using pre‑silicon hardware models.
  • Create and execute emulation test plans to support verification, performance analysis, software development, and system validation needs across multiple teams.
  • Collaborate closely with RTL design, verification, and firmware teams to define requirements, develop accurate hardware models, and ensure seamless integration into the emulation environment.
  • Debug complex SoC and subsystem issues across RTL, firmware, emulation platforms, and toolchain interactions.
  • Optimize emulation performance, including model partitioning, timing, and runtime efficiency.
  • Automate flows and improve productivity through scripting (Python, Perl, Tcl, shell) and tooling enhancements.
  • Interface with EDA vendors (Synopsys, Cadence, Siemens) to evaluate tool capabilities, resolve technical issues, and drive feature improvements.

Benefits

  • employee stock purchase plan with a 2-year look back
  • family support programs to help balance work and home life
  • robust mental health resources to prioritize emotional well-being
  • recognition and service awards to celebrate contributions and milestones
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