Senior Engineer II - Emulation

Microchip Technology Inc.•Roseville, CA

1d•Onsite

About The Position

The Architecture Co-Verification team (ACOV) is an exciting, fast paced team responsible for enabling HW/FW development and coverification of state-of-art System-On-Chip (SoC) devices using industry leading HW emulators (such as Cadence Palladium and Protium). The team is deployed in all aspects of SoC development phases from architectural exploration to post-silicon validation, HW/FW codevelopment, pre-silicon functional co-verification, pre/post-silicon performance testing, power analysis, and critical post-silicon investigations. As a Senior Engineer II - Emulation, you will be working closely with hardware designers, firmware engineers, and verification teams throughout the SoC development process. This is a role for a versatile engineer that enjoys the challenges of HW/FW co-development and system level co-verification using leading edge HW emulators and FPGA platforms. It’s a high visibility role that will develop a wide range of skills and exceptional problem-solving ability.

Requirements

BS/MS degree in Electrical/Electronic Engineering or Computer Engineering
7.5 to 10 years of relevant work experience.
7.5+ years' experience with one or more serial protocols such as SAS/SATA/NVMe and a thorough knowledge of PCIe.
Knowledge of key components of a server and storage solution including Windows/Linux host driver architectures.
Willing to learn in a fast-paced environment, and being an organized self-starter.
Proficient Linux experience and strong programming/scripting skills with languages such as C, Python, Tcl and Bash.
Proficient in digital design, RTL coding with VHDL, Verilog, or System Verilog experience.
Creation & management of system validation testing schedules and their execution.
Knowledge of MIPS, ARM, or RISC-V architecture, including JTAG, I2C, and firmware programming.

Nice To Haves

Excellent analytical and documentation skills.
Strong problem solving, communication and interpersonal skills are required.
Ability to quickly learn new technologies.
Highly motivated team player who sets personal goals and achieves those goals without supervision.
Experience with RAID HBA’s, SAS Controllers and their associated Software Testing Strategies in an asset.
Experience with test automation, testing methodologies, and test tools.
Isolation and resolution of complex software & firmware problems in embedded real-time systems.
Troubleshoot and resolve complex problems in embedded multi-core real-time systems.
Knowledge of Embedded Linux development as well as RTOS constructs including processes, threads, scheduling, synchronization mechanisms, memory management.
Cadence infrastructure support and process flows in an asset.

Responsibilities

Porting SoC RTL to industry leading HW emulators and FPGA platforms.
Developing emulation specific HW for pre-silicon subsystem/system level co-verification.
Developing common test ecosystem across pre/post silicon.
Developing FW and tests for pre-silicon subsystem/system level co-verification.
Troubleshoot and resolve complex problems in embedded multi-core real-time systems executing emulation test plans.
Utilize state of the art protocol analyzers for analysis and error injection.
Utilization of test and defect tracking tools to document and report on verification progress and product quality.
Effectively present technical information to small teams of engineers.