Principal, Emulation Engineer

Marvell Technology•Santa Clara, CA

5d•$150,680 - $225,700

About The Position

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact About the Team The Connectivity Business Unit at Marvell is at the forefront of delivering high-performance silicon for the world's most demanding data infrastructure, spanning Optical DSPs, PCIe/CXL retimers, high-speed Ethernet PHYs, and AEC/AOC enablement devices. Within the BU, the Pre-Silicon Emulation team plays a critical role in program execution—bridging RTL design and real-world system behavior before a single chip is taped out. Our team owns emulation model development, test execution, and system-level debug across Marvell's emulation platforms (Palladium, Veloce, Zebu), enabling early firmware bring-up, hardware/software co-validation, and risk reduction on the path to silicon. We work closely with design, verification, firmware, software, and post-silicon teams to ensure emulation is a productive, schedule-driving resource—not a bottleneck. If you thrive on solving complex technical problems at the intersection of hardware and software, and want your work to directly impact the success of next-generation connectivity silicon, we'd love to hear from you. What You Can Expect What You Can Expect Execute emulation model bring-up, test development, and debug for connectivity silicon programs, including ODSP, PCIe/CXL retimers, high-speed Ethernet PHYs, and AEC/AOC enablement devices, on platforms such as Palladium, Veloce, and Zebu. Work with design, validation, and firmware teams to understand emulation hardware and software requirements, and implement platform configurations, transactors, speed bridges, protocol adapters, and firmware/software stacks. Engage with EDA and emulation hardware vendors to resolve platform, tooling, and model issues and maintain a productive emulation environment. Develop and maintain HW/SW enablement flows and scripts to support RTL validation and improve emulation model usability for firmware, driver, and system software development. Collaborate with pre-silicon validation, design, firmware, and post-silicon teams to identify and resolve emulation bottlenecks and improve validation coverage. Build and maintain automation scripts and infrastructure to improve emulation environment productivity, reliability, and utilization within assigned programs.

Requirements

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 7+ years of relevant experience, or a Master's/PhD with 3+ years of experience.
Hands-on experience with one or more SoC emulation platforms (Palladium, Veloce, Zebu), including building and maintaining emulation models for SoC designs.
Background in test planning, simulation, and debug in Verilog/SystemVerilog environments.
Experience with SoC development flows, emulation-based debug, and system-level validation.
Scripting and automation skills using Python, Perl, Tcl, and/or UNIX shell.
Ability to collaborate effectively with cross-functional teams including design, validation, firmware, and vendor partners.

Nice To Haves

Experience with emulation of networking devices or mixed-signal designs, including systems containing PHY or Layer-2/Layer-3 functionality.
Exposure to connectivity-focused silicon, such as: Optical DSPs (ODSP) PCIe/CXL retimers High-speed Ethernet PHYs AEC/AOC enablement devices
Familiarity with firmware or software bring-up using emulation platforms.
Experience contributing to or improving emulation infrastructure within a project or product line.

Responsibilities

Execute emulation model bring-up, test development, and debug for connectivity silicon programs, including ODSP, PCIe/CXL retimers, high-speed Ethernet PHYs, and AEC/AOC enablement devices, on platforms such as Palladium, Veloce, and Zebu.
Work with design, validation, and firmware teams to understand emulation hardware and software requirements, and implement platform configurations, transactors, speed bridges, protocol adapters, and firmware/software stacks.
Engage with EDA and emulation hardware vendors to resolve platform, tooling, and model issues and maintain a productive emulation environment.
Develop and maintain HW/SW enablement flows and scripts to support RTL validation and improve emulation model usability for firmware, driver, and system software development.
Collaborate with pre-silicon validation, design, firmware, and post-silicon teams to identify and resolve emulation bottlenecks and improve validation coverage.
Build and maintain automation scripts and infrastructure to improve emulation environment productivity, reliability, and utilization within assigned programs.