Principal ASIC/SoC Design Engineer
About The Position
Design and deliver complex custom ASICs from concept through silicon. This hands-on role covers the full ASIC/SoC development flow and collaborates with architecture, verification, physical design, applications, and business teams to translate technical requirements into high-performance silicon while optimizing power, performance, and area (PPA). The engineer will also evaluate customer requirements, develop technical approaches and effort estimates for new opportunities, and help improve internal design methodologies and processes. Experience in radiation-hardened design, analog/mixed-signal circuits, EDA methodologies, or standard-cell library development may also be applied and expanded.
Requirements
- BSEE, MSEE, or equivalent.
- At least 10 years of direct industry experience with ASIC and/or SoC design.
- Proficiency in Synopsys Design Compiler and other EDA tools.
- Strong understanding of digital design principles.
- Familiarity with RISC architectures such as ARM or MIPS.
- Strong background in RTL-based digital IC design using Verilog/SystemVerilog.
- Proven track record of first-pass successes.
- Proficiency with UNIX/Linux, including shell scripting and text utilities such as sed, awk, and grep; using Modules; and high-level programming or scripting in C/C++, Perl, Python, or Tcl.
- Proficiency with Windows applications including Word, Excel, PowerPoint, Visio, Project, and PDF conversion.
- Experience with industry-standard development tools and methodologies.
- Excellent problem-solving skills and attention to detail.
- Ability to take initiative and assume leadership roles.
- Ability to work well in a diverse team environment.
- Willingness to mentor junior engineers.
Nice To Haves
- Experience in radiation-hardened design.
- Experience with analog/mixed-signal circuits.
- Experience with EDA methodologies.
- Experience with standard-cell library development.
Responsibilities
- Lead ASIC architectural design based on high-level requirements and block diagrams.
- Collaborate with system architects to define chip functionality, interfaces, and performance targets.
- Develop detailed specifications for chip components.
- Create RTL designs using Synopsys Design Compiler and optimize RTL for area, power, and performance.
- Implement and verify complex digital blocks.
- Develop timing constraints for the entire chip and coordinate with physical design teams on place-and-route.
- Constrain and verify RISC processors within the chip, optimizing processor performance and power efficiency.
- Collaborate with physical design teams on floorplanning, placement, and routing, and address design-closure issues.
- Work with verification engineers to ensure functional correctness and assist with testbench creation and chip-functionality verification.
- Use modern revision-control tools and best practices in a collaborative, multi-site design community.
- Evaluate customer requirements and develop technical approaches and effort estimates for new opportunities.
- Help improve internal design methodologies and processes.
- Mentor junior engineers.
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What This Job Offers
Job Type
Full-time
Career Level
Principal
