Principal ASIC Design Verification Engineer - Terawave
About The Position
At Blue Origin, we envision millions of people living and working in space for the benefit of Earth. We’re working to develop reusable, safe, and low-cost space vehicles and systems within a culture of safety, collaboration, and inclusion. Join our team of problem solvers as we add new chapters to the history of spaceflight! Blue Origin is pioneering the future of space-based communications with TeraWave, a revolutionary satellite communications network designed to deliver symmetrical data speeds of up to 6 Tbps anywhere on Earth. This multi-orbit constellation will consist of optically interconnected satellites in low Earth orbit (LEO) and medium Earth orbit (MEO), providing enterprise-grade connectivity for critical operations worldwide. The Principal ASIC Verification Engineer serves as a technical authority for verification of advanced ASICs enabling next-generation Satellite communication systems. This role sets verification strategy across one or more silicon programs and ensures robust methodologies for functionally complex, high-performance communication hardware.
Requirements
- BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field.
- 12+ years of ASIC/SoC verification experience.
- Expert-level knowledge of System Verilog, UVM, assertions, and verification signoff methodology.
- Proven success leading verification for complex chips or multiple tape-outs.
- Strong understanding of communication signal-processing hardware and system-level integration.
- Excellent technical leadership and cross-organizational communication skills.
Nice To Haves
- Deep expertise in Space based communications, digital modems, phased-array processing, or payload processing.
- Experience with formal property verification, emulation, and performance validation.
- Familiarity with fault tolerance, mission-critical reliability, or radiation-aware verification considerations.
- Experience with architectural modeling and verification planning for hardware/software partitioned systems.
- Strong record of technical innovation and process improvement.
Responsibilities
- Define end-to-end verification strategy for large Satellite communication ASIC or SoC programs.
- Establish verification methodologies, infrastructure, and signoff criteria across block, subsystem, and SoC levels.
- Lead verification planning for complex communication functions such as modem pipelines, FEC engines, digital beamforming, packet processing, and control fabrics.
- Drive alignment among design, architecture, systems, firmware, and validation teams.
- Evaluate verification completeness through coverage, assertions, formal analysis, emulation, and silicon correlation.
- Resolve critical technical issues and direct root-cause analysis for the most complex functional failures.
- Guide development of reusable VIP, reference models, and regression automation frameworks.
- Mentor technical leaders and raise the overall verification maturity of the organization.
- Influence future verification roadmap, tool strategy, and reuse models.
Benefits
- Medical, dental, vision, basic and supplemental life insurance, paid parental leave, short and long-term disability, 401(k) with a company match of up to 5%, and an Education Support Program.
- Stock Options for all regular employees (working at least 20 hours/week)
- Paid Time Off: Up to four (4) weeks per year based on weekly scheduled hours, and up to 14 company-paid holidays.
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What This Job Offers
Job Type
Full-time
Career Level
Principal
