Principal Analog Design Engineer

Qorvo • Richardson, TX

1d • $170,300 - $221,500 • Hybrid

About The Position

Qorvo's fast-growing Power Management division is at the forefront of innovation in Power Loss Protection, PMICs, Motor Control, and Battery Management solutions, serving a diverse range of applications across Mobile, Consumer, IoT, and Industrial markets. We are seeking a highly skilled Analog Power Design Engineer to develop next-generation, high-performance power management solutions. In this role, you will drive architecture, design, and validation of industry-leading analog power ICs, collaborating closely with cross-functional global teams to deliver world-class products that set new benchmarks in efficiency, reliability, and performance. This is a hybrid position where the expectation is to be onsite multiple days a week at either our Richardson TX or San Jose CA office.

Requirements

• A minimum of a bachelor’s degree in electrical engineering
• 12+ years of engineering experience (or an equivalent amount of education and expereince) working in the semiconductor industry
• 8+ years of experience (or an equivalent amount of education and expereince) in analog and mixed-signal Integrated circuit (IC) design, with DC-DC power converter architectures and control methodologies such as voltage mode control and current mode control
• Ability to communicate highly technical concepts effectively to both technical and non-technical stakeholders
• Experience working in Electronic Design Automation (EDA) tools such as EMIR tools capacitive coupling tools and flows, parasitic extraction tools, floating nodes, etc.
• Experience with production release of power management ICs

Nice To Haves

• Masters or PHD in Electrical Engineering
• Experience with Cadence Virtuoso, Simplis, and ADS
• Hands-on lab experience supporting high frequency switching power supplies in the semiconductor power management industry

Responsibilities

• Lead the design and development of high-performance analog power management ICs, ensuring best-in-class efficiency, power density, and reliability.
• Collaborate with system engineers to define product architecture and specifications, balancing performance, power, and cost requirements.
• Select and implement optimal circuit topologies, ensuring robustness, yield, and manufacturability.
• Conduct transistor-level design, simulation, and validation to meet functional and performance specifications.
• Work closely with layout engineers to optimize floor planning, parasitic, and overall silicon performance.
• Engage with global design teams, including colleagues in Asia, to align on development strategies and execution plans.
• Partner with test and characterization engineers to define validation methodologies, troubleshoot design issues, and optimize production test strategies.
• Drive technical reviews and documentation, presenting design decisions, analysis, and trade-offs to internal stakeholders.

Benefits

• Competitive base salary commensurate with experience: $170,300 - $221,500, relevant for the California Bay Area (subject to change dependent on physical location)
• Base compensation is one element of Total Rewards offered at Qorvo. More information on the Total Rewards package can be shared upon request.

What This Job Offers

• Job Type: Full-time
• Career Level: Principal