Principal AI Software Engineer

Microsoft•Redmond, WA

4d•$142,800 - $304,200

About The Position

The SPARC organization is responsible for strategy, planning and architecture pathfinding, and manages Azure’s hardware roadmap from architecture concept, through production for Microsoft’s current and future offerings. The CSA team within SPARC is at the forefront of systems architecture and technology pathfinding spanning compute, memory, storage, and system interconnects. Drawing on deep insights of workloads, emerging technology trends, and focused industry engagements, CSA team’s charter is to define and evaluate novel systems architecture innovations through hardware/software co-design and advance them through technical readiness for productization. Join our Compute System Architecture (CSA) team within the System Planning and Architecture (SPARC) organization in Azure Hardware Systems & Infrastructure (AHSI). AHSI is the team behind Microsoft’s expanding cloud business, responsible for delivering the hardware systems and infrastructure for cloud computing across Microsoft Azure, Bing, MSN, Office 365, OneDrive, Skype, Teams and Xbox Live. The CSA team is seeking a Principal AI Software Engineer!

Requirements

Bachelor's Degree in Computer Science or related technical field AND 6+ years technical engineering experience with coding in languages including, but not limited to, C, C++, C#, Java, JavaScript, or Python OR equivalent experience.
Ability to meet Microsoft, customer and/or government security screening requirements are required for this role. These requirements include but are not limited to the following specialized security screenings: Microsoft Cloud Background Check: This position will be required to pass the Microsoft Cloud Background Check upon hire/transfer and every two years thereafter.

Nice To Haves

12+ years of experience in systems software (OS kernel, memory management, I/O stacks, Virtualization) with demonstrated track record of success, guiding architecture and software enabling.
10+ years of experience leading significant hardware/software co-design projects involving CPU and/or systems architecture and influencing technical direction.
Deep expertise in Linux kernel internals, memory management, I/O subsystems, NUMA, DMA, and GPU/CPU/storage/network data paths.
Hands-on experience with NVIDIA GPU software stacks including CUDA, NCCL, GPUDirect Storage (GDS), and GPUDirect RDMA (GDR).
Understanding of AI inference infrastructure, large GPU clusters, inference serving architectures, and workload performance optimization.
Experience characterizing and optimizing KV Cache intensive workloads including long-context, agentic, multi-turn, coding, and reasoning workloads.
Experience with inference frameworks such as vLLM, SGLang, and TensorRT-LLM.
Familiarity with KV Cache technologies including LMCache, SGLang HiCache, cache offload, cache sharing, and memory tiering approaches.
Experience designing or extending inference runtimes, scheduling systems, memory management components, or KV Cache subsystems.
Understanding of disaggregated prefill/decode architectures, distributed inference serving, and multi-node cache-sharing topologies.
Experience with CXL memory expansion, memory pooling, and memory tiering solutions in large-scale deployments.
Software development skills in C/C++, Python, CUDA, and distributed systems.
Skilled in partnering and influencing architects, hardware engineers, and software leads
Ability to manage through ambiguity, bringing clarity and results orientation to engage and energize collaborators and stakeholders
Collaboration skills, teamwork, and sense of presumed responsibility
Verbal and written communication skills, and ability to articulate and engage with both technical and non-technical stakeholders at all levels.
Experience leading and driving complex projects with respect and integrity, including those with multiple workstreams spanning different business and technical disciplines.
Intellectual curiosity and passion about learning and deploying new technologies.
Problem-solving skills, analytical capabilities, and attention to detail

Responsibilities

Lead full system software prototyping to develop capable proof-of-concepts to evaluate hardware/software co-designed capabilities for memory TCO reduction such as through memory tiering/pooling and overcommit solutions for Azure usages and deployment scenarios.
Develop deep insights through workload characterization and correlation to identify systems optimization opportunities.
Collaborate with diverse workload experts across Microsoft and partner ISVs to engineer TCO-optimized solutions for Azure general-purpose and specialized compute fleet.
Influence and shape hardware architecture and industry alignment, targeting three-to-six-year timeframe, with data-driven analysis, insights and recommendations.
Lead characterization and optimization of Large Language Model (LLM) inference workloads with focus on KV Cache capacity, placement, migration, and utilization across GPU HBM, host DRAM, CXL memory expansion/pooling, SSD, and emerging memory tiers.
Develop proof-of-concepts and evaluation frameworks to assess memory-tiering architectures for AI inference, including CXL pooled memory, memory expansion solutions, context-memory platforms, SSD-backed cache tiers, and hardware/software co-designed approaches for reducing inference TCO.
Design and execute workload characterization studies for agentic, multi-turn, coding, reasoning, and long-context AI workloads to quantify memory consumption, latency, throughput, token efficiency, and system utilization.
Analyze end-to-end data movement across GPU, CPU, storage, and networking subsystems, identifying optimization opportunities within GPU Direct Storage (GDS), GPU Direct RDMA (GDR), peer-to-peer memory transfers, and distributed inference pipelines.
Develop software prototypes, framework extensions, and instrumentation to evaluate KV Cache offload, prefetching, migration, compression, deduplication, and memory-overcommit techniques.
Build performance models and simulation frameworks to predict the impact of memory hierarchy innovations on large-scale inference deployments.