Power Integrity Intern

d-Matrix • Santa Clara, CA

1d • Onsite

About The Position

At d-Matrix, we are focused on unleashing the potential of generative AI to power the transformation of technology. We are at the forefront of software and hardware innovation, pushing the boundaries of what is possible. Our culture is one of respect and collaboration. We value humility and believe in direct communication. Our team is inclusive, and our differing perspectives allow for better solutions. We are seeking individuals passionate about tackling challenges and are driven by execution. Ready to come find your playground? Together, we can help shape the endless possibilities of AI.

We are seeking a highly motivated and technically curious Summer Intern to join our Power Integrity (PI) engineering team. The intern will work alongside senior engineers on real hardware projects, gaining hands-on experience in power delivery network (PDN) analysis, simulation, and board-level characterization. This role is ideal for a student pursuing a degree in Electrical Engineering with an interest in high-speed digital hardware design.

Requirements

• Currently enrolled in a Master's or PhD program in Electrical Engineering, Computer Engineering, or a closely related field.
• Foundational understanding of circuit theory, passive components (resistors, capacitors, inductors), and DC/AC circuit analysis.
• Familiarity with PCB design concepts (schematics, layers, decoupling capacitors).
• Basic proficiency with SPICE ((LTspice, HSPICE, or similar)

Nice To Haves

• Coursework or project experience in power electronics, signal integrity, or electromagnetics.
• Exposure to tools such as Ansys SIwave, Cadence Sigrity PowerDC/PowerSI, or Keysight ADS.
• Experience with lab equipment: oscilloscopes, power supplies, network analyzers, or VNAs.
• Familiarity with Python or MATLAB for data analysis and plotting.
• Understanding of VRM datasheets and switching regulator operation.
• Experience reading and interpreting Cadence Allegro layout files

Responsibilities

• Assist in building and simulating power delivery network models using industry-standard tools (e.g., Ansys SIwave, Cadence Sigrity, or equivalent).
• Develop automation tools for PDN analysis
• Support PDN impedance analysis and voltage margin analysis for multi-rail PCB designs.
• Perform lab measurements including oscilloscope-based ripple/noise capture, VRM transient response testing, and power rail turn-on sequencing.
• Assist in correlation between simulation models and measured hardware results.
• Document findings, create summary reports, and present results to the team.

What This Job Offers

• Job Type: Full-time
• Career Level: Intern
• Number of Employees: 101-250 employees