Post Silicon Engineer (eInfochips)

Arrow ElectronicsCupertino, CA
Onsite

About The Position

As a Senior Validation Engineer on our Machine Learning Acceleration team, you will work from early design validation through emulation, silicon bring-up, post-silicon validation, and ongoing support of production systems deployed in AWS data centers. You'll collaborate deeply with architecture, RTL design, design verification, firmware, and software teams to ensure our next-generation AI/ML accelerators meet the highest standards of quality and performance. This role requires bridging multiple domains and broad scope of impact—from low-level hardware interfaces to high-level ML workloads—to deliver exceptional results.

Requirements

  • Strong programming skills (Python, Lua, C/C++, Rust, Go, etc)
  • A solid understanding of computer architecture and chip/system validation methodologies
  • Experience with cloud infrastructure and CI/CD
  • Firmware testing and/or development (BIOS, BMC, drivers)
  • Domain expertise in any of these areas: PCIe, HBM, GPUs, neural networks, ML HW architecture
  • Knowledge of the full validation lifecycle from RTL simulation (SystemVerilog/UVM, VCS, Questa, Xcelium) and emulation (Palladium, Zebu, Veloce) through silicon failure analysis and debug
  • 5+ years of programming with at least one software programming language experience
  • Bachelor's degree or above in computer science, computer engineering, or related field, or Bachelor's degree
  • 5+ years of non-internship system test development, code reviews, source control management, build processes, automated deployments, and operations experience.
  • Experience with Linux environments and Git.
  • Experience with server hardware and debug tools
  • Experience with Machine Learning Hardware/Software Architecture
  • Experience with CI/CD
  • Experience with EDA Simulations or Emulation

Responsibilities

  • Developing comprehensive validation strategies and leads new methodologies to improve validation coverage and time to root cause.
  • Role models detailed test plans covering functional, performance, power, and stress testing from silicon bring-up to product release
  • Mentors and provides direction to junior validation engineers
  • Executes complex test plans from RTL simulation and emulation environments through physical silicon validation
  • Handing complex debug including hands-on silicon bring-up and debug in the lab using oscilloscopes, logic analyzers, and protocol analyzers
  • Validating ML accelerator performance, accuracy, and reliability using real-world neural network workloads
  • Building test infrastructure, CI/CD, and automated regression frameworks to enable efficient validation at scale
  • Collaborating across architecture, design, firmware, and software teams to triage failures and drive root cause analysis to closure
  • Reviewing test results, identifying patterns, and providing feedback to improve design quality and validation coverage
  • Delivering new tests to production systems in AWS data centers and manufacturing to improve fleet health
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