Physical Design PDK Engineer

Applied Materials • Santa Clara, CA

3d • $152,000 - $208,500 • Onsite

About The Position

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips. Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry. The work we do together advances the world’s technology.

Requirements

• Expertise in PDK enablement and library validation/automation.
• Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies
• Design/System level experience with DTCO and PPA analysis
• Hands-on expertise in TCL, Python, make and shell scripting
• Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus)
• Knowledge of standard cell architecture and design tradeoffs with respect to PPA
• Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise
• Creative thinking and ability to look ahead and anticipating future technology innovations/issues
• Ability to collaborate with internal stakeholders, customers and vendors
• Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment

Nice To Haves

• Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus

Responsibilities

• Expertise in PDK enablement and library validation/automation.
• Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies
• Design/System level experience with DTCO and PPA analysis
• Hands-on expertise in TCL, Python, make and shell scripting
• Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus
• Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus)
• Knowledge of standard cell architecture and design tradeoffs with respect to PPA
• Proactively identify and act on new trends or developments in future technology nodes
• Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise
• Creative thinking and ability to look ahead and anticipating future technology innovations/issues
• Ability to collaborate with internal stakeholders, customers and vendors
• Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment

Benefits

• supportive work culture that encourages you to learn, develop, and grow your career
• comprehensive benefits package
• participation in a bonus and a stock award program, as applicable

What This Job Offers

• Job Type: Full-time
• Career Level: Senior
• Education Level: No Education Listed