Physical Design PDK Engineer

Applied Materials•Santa Clara, CA

2d•Onsite

About The Position

Applied Materials is the global leader in materials science and engineering solutions that are at the foundation of virtually every new semiconductor chip and advanced display in the world. The equipment that we create and service is essential to advancing AI and accelerating the commercialization of next-generation semiconductor chips. Join us and push the boundaries of materials science and engineering in a company at the foundation of the electronics industry. The work we do together advances the world’s technology. At Applied Materials, we care about the health and wellbeing of our employees. We’re committed to providing programs and support that encourage personal and professional growth and care for you at work, at home, or wherever you may go. Applied Materials is the leader in materials engineering solutions to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. Our innovations make possible™ the technology shaping the future. To achieve this, we employ some of the best, brightest, and most talented people in the world who work together as part of a winning team.

Requirements

Expertise in PDK enablement and library validation/automation.
Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies
Design/System level experience with DTCO and PPA analysis
Hands-on expertise in TCL, Python, make and shell scripting
Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus)
Knowledge of standard cell architecture and design tradeoffs with respect to PPA
Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise
Creative thinking and ability to look ahead and anticipating future technology innovations/issues
Ability to collaborate with internal stakeholders, customers and vendors
Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment

Nice To Haves

Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus

Responsibilities

Expertise in PDK enablement and library validation/automation.
Hands-on experience with LVS/Parasitic extraction/standard cell characterization flows and methodologies
Design/System level experience with DTCO and PPA analysis
Hands-on expertise in TCL, Python, make and shell scripting
Broad understanding of system design (product architecture, packaging, SRAM, DRAM, etc.) is a plus
Strong understanding of the RTL2GDS concepts and methodology and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus)
Knowledge of standard cell architecture and design tradeoffs with respect to PPA
Proactively identify and act on new trends or developments in future technology nodes
Ability to implement solutions and troubleshoot complex problems with limited or no supervision in area of expertise
Creative thinking and ability to look ahead and anticipating future technology innovations/issues
Ability to collaborate with internal stakeholders, customers and vendors
Collaborate/participate in discussions to solve interdisciplinary technical issues in a cross-functional team environment