IREM Physical Design Engineer

Advanced Micro Devices, Inc•Markham, ON

11d•Hybrid

About The Position

Join a world-class team driving power integrity solutions for AMD’s next-generation SoCs and advanced packaging technologies. In this role, you’ll define and optimize power delivery networks, perform IR-drop and EM analysis using industry-leading tools, and shape design methodologies for cutting-edge CPU/GPU products. You’ll partner closely with physical design, packaging, and CAD teams, gaining exposure to advanced 3DIC integration and high-performance compute challenges. This is an opportunity to influence architecture-level decisions and work in a collaborative, innovation-driven environment.

Requirements

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field preferred.

Nice To Haves

Experience with IR-drop and EM analysis using tools such as RedHawk or Voltus.
Knowledge of power delivery network design at chip and system levels (including advanced packaging/3DIC).
Familiarity with PnR flows, timing closure, and UPF/CPF power intent.
Scripting experience in Python or Tcl for automation and debug.
Strong understanding of signoff correlation across multiple analysis domains.

Responsibilities

Perform static/dynamic IR-drop and EM analysis and drive closure across large-scale SoCs.
Define and optimize power grid architecture, including decap strategy and current distribution planning.
Partner with physical design and packaging teams to align IR/EM signoff methodology with timing, floorplan, and system-level requirements.
Develop and validate power integrity models; ensure correlation across PD, STA, and EMIR tools.
Debug IR/EM issues, improve analysis methodology, and enable automation (Python/Tcl).
Provide clear risk assessments and implement ECOs to mitigate power integrity challenges.