Photonic Layout Engineer - New Grad

Ciena•Ottawa, ON

8d•CA$61,800 - CA$118,600

About The Position

As the global leader in high-speed connectivity, Ciena is committed to a people-first approach. Our teams enjoy a culture focused on prioritizing a flexible work environment that empowers individual growth, well-being, and belonging. We’re a technology company that leads with our humanity—driving our business priorities alongside meaningful social, community, and societal impact. Reporting to the manager of the Photonic Integrated Circuit (PIC) Design team, you will be primarily collaborating with the design team to create photomask layouts for our photonic chips. You will be a key link between device design and the semiconductor fabrication processes required to produce them, ensuring that the design can be realized within process constraints. This role requires good organizational skills and attention to detail. It offers the opportunity to learn how to develop and fabricate the advanced photonic components required for the optical networks of the future.

Requirements

BS degree or higher in a related engineering or science field (e.g. electrical engineering or material sciences)
Experience (3+ years) with using a layout editor such as L-Edit, DW2000, or Cadence for semiconductor device layout.
Experience in scripting masks and skilled in at least one programming language such as C/C++ or Python.

Nice To Haves

Familiar with semiconductor wafer fabrication methods (III-V, Si, etc.).
Good understanding of semiconductor device physics and principles.
Experience in design rule checking and other layout verification tools.

Responsibilities

Generating and maintaining layout designs.
Quality control and mask review.
Developing automated layout tools, including design rule checks and scripting.
Clear communication and collaboration with multidisciplinary Ciena teams and external foundry partners.