Photonic Layout Engineer

IonQ

2d•Hybrid

About The Position

We are looking for a Photonic Layout Engineer to join our QPU Design team at Oxford Ionics/IonQ. In this role, you will be responsible for the layout of photonic integrated circuits (PICs) that form a central part of our Quantum Processor Units (QPUs), the novel technology that sit at the heart of our quantum computers and contributes to the team’s mission of advancing the design of these high-performance chip. You will work closely with scientists, photonic design engineers and fabrication engineers to bring new designs for ion trapping chips into production. You’ll play an important part in shaping the hardware that supports our work in building the world’s most advanced quantum systems. In this position, you will work on integrating photonic components into complex multi-layer chips. This work will support the effective delivery of devices that make use of on-chip light delivery to allow scaling to thousands of qubits and beyond. You will have the opportunity to accelerate the tape-out of new chips and drive the design workflow of integrated photonics, contributing directly to the success of building utility-scale quantum computers. You will be responsible for arranging and routing photonic components on the chip, in coordination with the metal track and CMOS routing. You will produce reticle-size photonic layout files using Python scripts as part of tape-out of the full chip, suitable for use in a commercial foundry.

Requirements

Significant experience in the design and layout of Photonic Integrated Circuits (PICs).
Ability to consider requirements and constraints from other parts of the chip in the layout process.
Understanding the purposes of different photonic components.
Ability to contribute effectively within a fast moving, highly technical team.
Proficiency in Photonic Integrated Circuit layouts.
Familiarity with the principles of photonic devices, such as waveguides, beamsplitters, grating couplers or similar, including design, test and fabrication.
At least 2 years of experience working with Python software packages, specifically for photonic mask layout, such as Luceda IPKISS, GDSFactory or Klayout.
A degree in Photonics, Physics, Electrical Engineering or a related field, or equivalent industry experience.
Strong collaboration and communication skills.
Ability to work independently and prioritise tasks in a time-sensitive environment.

Nice To Haves

Experience in generating layout files for photonic devices or complex semiconductor devices, particularly with custom elements.
Knowledge of the manufacturing processes and techniques in these two fields.
Background in commercial simulation, verification and layout environments such as Synopsys, Cadence or Ansys.
Strong programming and software skills.

Responsibilities

Arranging and routing photonic components on the chip, in coordination with the metal track and CMOS routing.
Producing reticle-size photonic layout files using Python scripts as part of tape-out of the full chip, suitable for use in a commercial foundry.
Collaborating with scientists to discuss their requirements.
Interfacing with photonic designers, test engineers, packaging engineers and fabrication engineers to define design rules and shape component design.
Layout verification through DRC and LVS.
Contributing to custom layout Process Design Kits (PDKs) that are specific to IonQ and the foundry.
Documenting the layout process and the final tape-out mask files.