Performance Modeling Software Engineer, Platform Architecture

Apple•Austin, TX

18h

About The Position

Join Apple’s Hardware Technologies organization as a member of the system-on-chip (SoC) performance team, helping shape the architecture of future devices. The team collaborates across SoC architecture, design, power, and software to develop caches and memory systems that allow CPUs, GPUs, machine learning, camera, display, and connectivity components to work together seamlessly. The role focuses on performance models and infrastructure that provide high-quality, timely data for hardware design. You will translate design-space studies and hardware execution models into well-written, high-performance C++ software, and contribute across the modeling lifecycle—from early architectural exploration through post-silicon correlation. You will help ensure the simulator is performant, maintainable, and flexible so hardware architects can iterate quickly. The position also involves developing useful APIs, supporting idiomatic C++ practices among developers and AI agents, and structuring code for effective AI-assisted development. Additional work includes learning about SoC IP and chip-level architecture, building data analysis and visualization approaches, continuous regression testing, running performance simulations, and analyzing and presenting results.

Requirements

Bachelor’s degree.
Experience with hardware architecture and design issues.
Experience coding in C++ and Python.
Experience with computer architecture and software engineering principles.
Experience with data structures and algorithms.
10+ years of relevant experience.
Experience with multi-paradigm software development in C++.
Experience with multi-language programming environments and selecting the appropriate tool or language for a task.
Experience with Compiler Explorer and understanding compiler transformations.
Experience designing code conventions, structure, and documentation to make codebases tractable for humans, machines, and AI-assisted reasoning and navigation.
Experience with architectural and micro-architectural performance modeling.

Nice To Haves

MS or PhD in Computer Science, Electrical Engineering, or a related field.

Responsibilities

Develop performance models and infrastructure for SoC hardware design.
Translate design-space studies and hardware execution models into high-performance C++ software models.
Contribute to the full performance-modeling lifecycle, from early architectural exploration to post-silicon correlation.
Improve simulator performance, maintainability, and flexibility to support rapid architectural experimentation.
Develop APIs usable by non-expert C++ developers.
Train AI agents and non-expert C++ developers in idiomatic code and methods.
Structure codebases for effective use with AI-assisted development tools and reasoning.
Write clear, self-documenting code using consistent conventions, meaningful naming, and well-organized modules.
Learn about SoC IP and chip-level architecture.
Work on data analysis pipelines, visualization methodologies, and continuous regression testing.
Run performance simulations.
Analyze and present simulation results.