Performance Modeling Engineer

Advanced Micro Devices, Inc•Austin, TX

19h•Onsite

About The Position

At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career. AMD is seeking an experienced Performance Modeling Engineer to drive best‑in‑class system‑ and IP‑level performance for next‑generation AMD products, with a strong emphasis on I/O and memory‑subsystem performance. In this role, you will focus on pre‑silicon modeling through post‑silicon performance optimization, partnering closely with architects, designers, and verification teams to study performance behavior long before RTL is finalized. This is a highly visible, greenfield‑oriented role where your analysis and recommendations directly influence architectural tradeoffs, IP roadmaps, and real silicon outcomes in a fast‑moving, engineering‑driven environment.

Requirements

You bring a strong foundation in hardware architecture, performance analysis, and modeling, and you enjoy working at the intersection of data, architecture, and system‑level behavior.
You are comfortable using cycle‑accurate and higher‑level models to study IP performance across realistic system workloads, identify bottlenecks, and propose practical architectural solutions.
You are also a clear, effective communicator who can articulate complex performance findings, assumptions, and tradeoffs to cross‑functional partners and engineering leadership.
You thrive in collaborative, low‑micromanagement environments and proactively share insights, progress, and recommendations that help teams make informed design decisions.

Nice To Haves

Hands‑on experience with system‑level or IP‑level performance modeling.
Background in hardware architecture, RTL design, design verification, or related engineering roles.
Strong object‑oriented programming skills using Python (preferred) and/or C++.
Familiarity with PC and data‑center system architectures.
Knowledge of I/O connectivity protocols such as PCI Express and CXL.
Understanding of data‑center I/O workloads, memory bandwidth, and performance behavior.
Working knowledge of I/O virtualization concepts, including MMU behavior, shared virtual memory, and x86 or ARM architectures.
Exposure to accelerator‑based systems is a plus.

Responsibilities

Study IP‑ and system‑level architectural performance using cycle‑accurate and abstract models across representative workloads.
Participate in architecture exploration activities to evaluate performance tradeoffs across current and future AMD products.
Identify performance bottlenecks in the IP pipeline and propose data‑driven architectural enhancements.
Propose, execute, and oversee architectural case studies using existing silicon, RTL, and performance models.
Expand, maintain, and document performance modeling frameworks and infrastructure.
Support performance debugging and analysis in simulation, emulation, and post‑silicon environments.
Investigate performance regressions, interpret results, and define follow‑up actions.
Analyze trace captures from post‑silicon application workloads to inform optimization strategies.
Analyze complex datasets to help define requirements and direction for next‑generation IP roadmaps.
Interface closely with IP and SoC architects, performance verification leads, and performance working groups.
Communicate findings clearly through meetings, presentations, written reports, and regular updates to engineering peers and management.