PCB Design Layout Engineer

NVIDIASanta Clara, CA
$168,000 - $322,000

About The Position

We are looking for a Senior PCB Design Layout Engineer to join the Hardware Layout team. NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. More recently, GPU deep learning ignited modern AI — the next era of computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to seek, that only we can pursue, and that matter to the world. This is our life’s work, to amplify human creativity and intelligence. Make the choice to join us today.

Requirements

  • B.Sc. in Electrical Engineering or related field (or equivalent experience); advanced degree preferred.
  • 6+ years of overall relevant practical experience.
  • Proven leadership experience, with a track record of successfully managing teams and projects.
  • Excellent communication and interpersonal skills, with the ability to collaborate effectively across teams.
  • Detail-oriented approach with a focus on quality and reliability in PCB layout design.
  • Ability to thrive in a fast-paced, dynamic environment and adapt to changing priorities.
  • Strong problem-solving skills and the ability to troubleshoot complex design issues.

Nice To Haves

  • Proficiency in PCB design tools such as Cadence Allegro, or Mentor Graphics
  • Familiarity with industry standards and regulations related to PCB layout and manufacturing processes.
  • Strong understanding of high-speed digital design principles and signal integrity considerations.

Responsibilities

  • Working closely with product design engineers, perform PCB layout of high speed/high-density value-conscious PCBs for all business units at NVIDIA (Data Center, GPU Desktop, Notebook, Automotive, Professional, Deep Learning, and AI).
  • Complete development of CAD layout from detailed component placement, constraints management, with a concept of topology and signal and power integrity.
  • Be responsible for the design releases required generation of artwork files, ODB++, test reports, and electronic PCB documentation.
  • Ensure designs follow SI constraints, EMI/RFI control and FCC, UL and European regulations, IPC specification.

Benefits

  • Competitive salaries
  • Generous benefits package
  • Equity
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