Optical Design Engineer
About The Position
The Silicon One team develops hardware platforms for Cisco’s switching, routing, and wireless products. The Silicon Photonics product team works across the product lifecycle, from fundamental photonic building blocks to qualified products such as CPO, NPO, OCI, and pluggable modules. The team encourages innovation and continuous product optimization, including patent development. This role owns photonic integrated circuit (PIC) design from simulation and layout in Cadence Virtuoso through GDS tapeout and post-fabrication validation. The engineer collaborates with EIC and module teams to co-design opto-electronic chipsets that meet system-level specifications. The position involves managing multiple PIC designs and tapeouts in parallel, tracking designs through fabrication and validation, and is expected to contribute rapidly to product work. Within one or two years, the engineer is expected to design and own small test chips that support next-generation products.
Requirements
- Bachelor’s degree and 5 years of related experience, or a master’s degree and 3 years of related experience, or a Ph.D. and 0 years of related experience.
- Experience in silicon photonics circuit modeling, layouts and tapeouts, and fabrication processes, including testing and validation.
- Experience with passive and active photonic device layouts and GDS generation using appropriate EDA tools, such as Cadence Virtuoso.
- Experience with laboratory measurements, data analysis, and automation using tools such as MATLAB, LabVIEW, or Python.
Nice To Haves
- Experience working with cross-functional engineering teams.
- Experience with optoelectronic/RF simulation, including S-parameters, co-simulation with electronic drivers/TIAs, or HFSS.
- Experience working with silicon photonics foundries.
- Experience using AI tools for data analysis, testing, and validation.
Responsibilities
- Own the PIC product design cycle, from simulation and layout using Cadence Virtuoso through final GDS tapeout and post-fabrication validation.
- Collaborate with EIC and module teams to co-design optimized opto-electronic chipsets that meet system-level specifications.
- Manage multiple PIC designs in parallel and track them through the design, tapeout, fabrication, and validation cycle.
- Design and own small test chips within one or two years to support next-generation products.
- Contribute to product innovation and continuous optimization; Cisco encourages patent filings.
Benefits
- Medical insurance
- Dental insurance
- Vision insurance
- 401(k) with Cisco matching contribution
- Paid parental leave
- Short- and long-term disability coverage
- Basic life insurance
- Paid holidays
- Floating holiday for non-exempt employees
- Paid birthday day off
- Paid year-end holiday shutdown
- Personal wellness days
- Vacation time or flexible vacation time off, depending on employee classification
- Sick time
- Additional paid time away may be requested for critical or emergency family issues
- Optional paid volunteer days
- Annual bonuses for eligible non-sales employees
- Employees may be eligible for Cisco restricted stock unit grants
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What This Job Offers
Job Type
Full-time
Career Level
Mid Level
