MOSIS 2.0 revives and modernizes the original multi-project wafer (MPW) service, founded at the USC Information Sciences Institute in 1981. It serves as the semiconductor fabrication gateway within the DoD Microelectronics Commons, operating as part of the California Defense Ready Electronics and Microdevices Superhub (CA DREAMS). MOSIS 2.0 supports approximately 200 customer engagements and ~50 tapeouts per year, with access to advanced CMOS (Intel 18A, TSMC, GlobalFoundries) and compound semiconductor platforms (GaAs/GaN through WIN Semiconductors). Beyond fabrication access, MOSIS 2.0 conducts sponsored research in device technology, design enablement, and lab-to-fab transition for defense-relevant microelectronics. This position will lead the research team responsible for executing these growing research projects.
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Job Type
Full-time
Career Level
Senior
Education Level
Ph.D. or professional degree