Module Design Engineer Architect

Apple•Cupertino, CA

About The Position

We are seeking a highly skilled Camera Design Engineer Architect to lead the end-to-end electrical architecture definition and system integration of next-generation camera modules across Apple's product portfolio. This role focuses on architecting the complete electrical signal chain from image sensor to SoC ISP, defining power delivery networks, high-speed interface topologies, and control-plane architectures that enable industry-leading imaging performance. The ideal candidate will possess deep electrical engineering expertise with extensive knowledge in mixed-signal design, high-speed serial interfaces, and camera subsystem architecture. Strong technical proficiency is required in understanding CMOS image sensor readout architectures, MIPI CSI-2, ACI or ALPDP interface design, camera actuator (VCM, OIS) driver topologies, flash/strobe subsystems, and low-noise power management for imaging applications (including LDO/DC-DC selection, PSRR budgeting, decoupling strategy, and dynamic power state transitions). The architect must have thorough understanding of camera module electro-optical performance trade-offs, EMI/EMC considerations, and signal integrity constraints to define electrical solutions that meet aggressive image quality, power, and form-factor targets in consumer electronics applications including iPhone, iPad, Mac, Vision, and wearable devices. Beyond core architecture definition, this role demands hands-on involvement across the full product lifecycle, including driving pre-silicon architecture studies with SoC ISP and PMIC teams, defining board-level schematic and layout guidelines for camera subsystems, and ensuring architectural intent is preserved from concept through mass production. The architect will lead cross-functional design reviews and technical trade studies by providing quantitative analysis of architecture options, respond to bring-up and validation issues with deep debug of high-speed signaling and power integrity, and drive systematic root cause analysis on architectural gaps discovered during EVT/DVT/PVT phases. This position serves as a critical technical bridge between image sensor suppliers, SoC design teams, module mechanical designers, and system product design, requiring expertise in both camera electrical architecture and practical implementation in high-volume, high-reliability manufacturing environments.

Requirements

BS degree in Electrical Engineering, Computer Engineering, or a related field
Experience in electrical architecture, mixed-signal design, or camera/imaging subsystem development for consumer electronics
Experience defining or designing camera subsystems including image sensor interfacing, actuator drivers, and low-noise power delivery on rigid PCB, flex, or SiP substrates
Experience with high-speed serial interface design (MIPI CSI-2, D-PHY, C-PHY) including signal integrity analysis, channel simulation, and lab correlation

Nice To Haves

Master's or PhD in Electrical Engineering or relevant field and 10+ years relevant industry experience
Ability to lead EVT/DVT/PVT bring-up, own FACA processes, and resolve line-down or yield-impacting issues in fast-paced production environments
Working knowledge of imaging and interface standards and specifications (MIPI CSI-2, ACI, ALPDP, I2C/I3C, SPMI, SPI, MIPI CCS, EMI/EMC standards, IEC ESD)
Experience with camera factory testing equipment, End2End imaging validation methods, and electro-optical data interpretation for quality control
Excellent communication and collaboration skills to work effectively with cross-functional teams including SoC design, PMIC, algorithms, mechanical, optics, manufacturing, quality, and suppliers
Experience with statistical analysis tools and methodologies (SPC, DOE, 6-Sigma) applied to electrical characterization and yield engineering

Responsibilities

Lead the end-to-end electrical architecture definition and system integration of next-generation camera modules.
Architect the complete electrical signal chain from image sensor to SoC ISP.
Define power delivery networks, high-speed interface topologies, and control-plane architectures.
Drive pre-silicon architecture studies with SoC ISP and PMIC teams.
Define board-level schematic and layout guidelines for camera subsystems.
Ensure architectural intent is preserved from concept through mass production.
Lead cross-functional design reviews and technical trade studies.
Respond to bring-up and validation issues with deep debug of high-speed signaling and power integrity.
Drive systematic root cause analysis on architectural gaps discovered during EVT/DVT/PVT phases.
Serve as a critical technical bridge between image sensor suppliers, SoC design teams, module mechanical designers, and system product design.