Mixed Signal RTL Design Engineer

AppleCupertino, CA

About The Position

In this job, you will be responsible for RTL coding of blocks specified by you or others for advanced mixed signal circuits. You will be writing detailed design specification and will be in close collaboration with the system architect, circuit designers and design verification engineers. Formal tools like LINT, CDC, RDC will be used to guarantee RTL quality. Supporting design verification to ensure bug free silicon. Working with the PD team for timing closure for your designs and finally supporting silicon bring up.

Requirements

  • Bachelor's of Science in Electric Engineering
  • 10+ years of relevant experience

Nice To Haves

  • Deep knowledge of RTL design
  • Deep knowledge of Verilog and System Verilog
  • Good knowledge of Mixed signal concepts
  • Good knowledge of Algorithm development
  • Working experience with physical design teams
  • Good Knowledge of front-end tools (Verilog simulators, linters, clock domain crossing checkers)
  • Good knowledge of synthesis, static timing, DFT is a plus
  • Good knowledge of System-Verilog assertions, checkers and other design verification techniques are a plus
  • Good knowledge of scripting languages
  • Perl and Python are plusses
  • Good communication and presentation skills

Responsibilities

  • RTL coding of blocks specified by you or others for advanced mixed signal circuits
  • Writing detailed design specifications
  • Close collaboration with system architect, circuit designers, and design verification engineers
  • Using formal tools like LINT, CDC, RDC to guarantee RTL quality
  • Supporting design verification to ensure bug-free silicon
  • Working with the PD team for timing closure for designs
  • Supporting silicon bring up
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