Mixed Signal Design Verification Engineer

Intel Corporation•Hudson, MA

1d•$122,440 - $232,190•Hybrid

About The Position

Intel is a global leader in technology innovation, dedicated to creating products that transform industries and improve lives worldwide. We design and manufacture advanced silicon solutions that power the digital world. Our commitment to excellence drives us to push the boundaries of technology and deliver cutting-edge solutions that meet the needs of our customers. If you are passionate about innovation and eager to contribute to transformative projects, Intel is the place for you. Join us at Intel and be a part of a team that is shaping the future of power delivery technology.

Requirements

Bachelor's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of experience - OR - Master's Degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of experience
Experience in Digital logic experience.
Experience in VHDL/Verilog/System Verilog.
Experience in Testbench component development (preferably in OVM/UVM), and design debugging skills.

Nice To Haves

7+ years of related experience
Analog debug skills
Real number (current, voltage) simulation modeling and debug skills

Responsibilities

Performs functional verification of mixed signal logic components, including analog behavioral modeling, to ensure design will meet specification requirements.
Develops IP verification plans, test benches, and the verification environment to ensure coverage to confirm to mixed signal microarchitecture specifications.
Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs.
Replicates, root causes, and debugs issues in the presilicon environment.
Finds and implements corrective measures to resolve failing tests.
Collaborates with digital and analog architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals.
Documents test plans and drives technical reviews of plans and proofs with design and architecture teams.
Maintains and improves existing functional verification infrastructure and methodology.