Mixed Signal Circuit Design Coop

Nokia • San Jose, CA

1d • $24 - $73 • Onsite

About The Position

This is a cooperative education opportunity for students pursuing a Master's degree or PhD in Electrical Engineering, Computer Engineering, or a related field. The role involves designing, implementing, and simulating high-speed analog circuits, including ADCs and DACs, creating layout floor plans, and exploring circuit topology trade-offs. The position is located onsite in San Jose, CA, and is expected to last for 4+ months, from January 2027 to May 2027.

Requirements

• Familiarity with essential CAD tools, such as Cadence Virtuoso, Spectre, Incisive, Calibre, EMX, and Totem EM/IR, etc.
• Familiarity with analog / mixed signal IPs or chips in deep submicron CMOS technologies.
• Good understanding of device physics and the impacts of layout effects;
• Familiarity with behavioral modeling the blocks and circuits with Verilog-A or Verilog-AMS

Responsibilities

• Design, implement, and simulate the functionality and performance of various high speed analog circuits, including the ADCs and DACs
• Create the layout floor plans to optimize the overall performance
• Exploring the trade-offs of the different circuit topologies

Benefits

• Flexible and hybrid working schemes to balance study, work, and life
• Professional development events and networking opportunities
• Well-being programs, including Personal Support Service 24/7 - a confidential support channel open to all Nokia employees and their families in challenging situations
• Opportunities to join Nokia Employee Resource Groups (NERGs) and build connections across the organization
• Employee Growth Solutions, mentorship programs, and coaching support for your career development
• A learning environment that fosters both personal growth and professional development – for your role and beyond

What This Job Offers

• Career Level: Entry Level