Microelectronics Fabrication & Process Integration Engineer, MOSIS 2.0

University of Southern CaliforniaMarina Del Rey, CA
Hybrid

About The Position

MOSIS 2.0 seeks a Microelectronics Fabrication & Process Integration Engineer to translate innovative semiconductor process designs into fabricated and packaged hardware through a network of university and industry fabrication partners. This hybrid, customer-facing role supports semiconductor process prototyping projects from technical intake through fabrication and production handoff, coordinates with partner nanofabrication and packaging facilities, and contributes to data-driven process optimization initiatives.

Requirements

  • Bachelor’s degree in Electrical Engineering, Materials Science, Physics, or related field and 5+ years of industrial semiconductor fabrication experience.
  • Working knowledge of semiconductor device physics and fabrication fundamentals.
  • Experience supporting process development, troubleshooting, or yield improvement in a fabrication facility.
  • Strong written and verbal communication skills and ability to collaborate across technical teams.
  • Candidate must be a U.S. Person (U.S. citizen or lawful permanent resident).

Nice To Haves

  • Master’s degree in a related field and 2+ years of industrial semiconductor fabrication experience.
  • PhD in a related field with 0–5 years of post-degree experience.
  • Hands-on experience in micro- or nanofabrication (lithography, deposition, etch, metrology).

Responsibilities

  • Support semiconductor prototyping projects from technical intake through fabrication, metrology, packaging coordination, and production handoff.
  • Translate customer requirements into executable fabrication process plans and assist with feasibility assessments.
  • Serve as a technical liaison to partner university nanofabrication facilities and industry fabs; participate in recurring technical progress reviews.
  • Assist with process development, recipe documentation, troubleshooting, and yield improvement efforts in nanofabrication environments.
  • Coordinate wafer-to-package transitions and collaborate with packaging partners on assembly and test requirements.
  • Support process transfer and readiness assessments across partner facilities.
  • Collaborate with internal research teams on data-driven process optimization and AI/ML-enabled manufacturing analytics.
  • Maintain documentation of process flows, metrology results, and partner capabilities.

Benefits

  • USC is an equal opportunity employer.
  • All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, protected veteran status, disability, or any other characteristic protected by law or USC policy.
  • USC observes affirmative action obligations consistent with state and federal law.
  • We provide reasonable accommodations to applicants and employees with disabilities.
  • Inquiries will be treated as confidential to the extent permitted by law.
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