Manager, SOC Product & Test Engineering
About The Position
In this highly visible role, you will lead a global Product and Test Engineering team to deliver the market’s next generation of high-performance mobile and desktop processors while cultivating world-class engineering talent. Plan and execute early silicon bring-up, comprehensive characterization, final product definition, and comprehensive test solution development—encompassing Sort, ATE (automated testing equipment), and System-Level Test (SLT) hardware and test programs—through to high-volume production ramp. Act as a critical technical bridge between Executive Leadership, the Business Unit, Design Validation, Supply Chain, and external OSAT manufacturing partners to deliver optimized microprocessor solutions that directly fuel company profitability.
Requirements
- Expert in Advantest V93000 Smart Scale and EXA Scale platforms, including SmarTest (SMT7/SMT8), multicore test methodologies, and platform transitions.
- Deep experience with advanced SoC testing, including scan, functional, high-speed interface, and chiplet-based architectures.
- Strong background in high-volume manufacturing, test time reduction, yield optimization, CpK monitoring, and OSAT production environments.
- Proven leader of global, multi-site 93K test engineering teams, driving execution, accountability, and technical excellence.
- Experienced in hiring, mentoring, and developing engineers, including transitioning teams to modern Advantest platforms.
- Skilled at establishing KPIs, managing resources, and balancing product launches with long-term test strategy.
- Strong cross-functional collaborator, partnering with DFT, validation, design, and manufacturing teams to drive successful product delivery.
- Extensive expertise leading Advantest V93000 (93K) test infrastructure, automation, test coverage, and efficiency improvements.
- Master of Science (MS) in Electrical Engineering, Computer Engineering, or a closely related technical discipline.
Responsibilities
- Deliver production-ready test programs and hardware fixtures ahead of critical product launch windows.
- Drive continuous test time reduction (TTR) and structural yield optimization to maximize gross margins.
- Seamlessly translate complex silicon behavior and yield data into actionable roadmaps for executive stakeholders.
Benefits
- AMD benefits at a glance
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What This Job Offers
Job Type
Full-time
Career Level
Manager
