Low-Power & CDC Verification Engineer
About The Position
As a Low-Power & CDC Verification Engineer at AMD, you will work with formal experts and designers to verify formal properties and drive convergence. The role focuses on scoping and planning verification for power features, coordinating verification development across teams, reviewing and signing off deliverables, and working with the RTL team to debug and sign off power and clock domain crossing violations for project milestones. The ideal candidate is passionate about modern, complex processor architecture, digital design, and verification; communicates effectively and works well with a team; and brings strong analytical and problem-solving skills along with a willingness to learn. This role is not eligible for visa sponsorship.
Requirements
- Bachelor’s or master’s degree in Computer Engineering or Electrical Engineering.
- At least 1 year of experience in feature verification from high-level design through tape-out verification.
- Experience working in simulation, emulation, and formal verification environments.
- Power/clock domain crossing exposure and UPF experience.
- Scripting experience in Perl or Python.
Nice To Haves
- Leadership skills.
Responsibilities
- Review power features for verification scoping and test plan writing.
- Coordinate with various teams to develop verification components using various methodologies.
- Review and sign off verification deliverables on power features for project milestones.
- Work with the RTL team to debug and sign off power/clock domain crossing violations for project milestones.
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What This Job Offers
Job Type
Full-time
Career Level
Entry Level
