Lead Systems/DSP Engineer

Ethernovia, Inc.•San Jose, CA

23h•$180,000 - $250,000•Hybrid

About The Position

Ethernovia is developing the future of Ethernet-based networks to realize the full potential of software-defined and autonomous vehicles, robotics and other intelligent machines. Founded in 2018, the company’s breakthrough data transport and acceleration technology is ushering in a new era of connectivity and capabilities in the vehicle and at the edge, including highly reliable autonomy, over-the-air servicing and AI-backed applications. Ethernovia's co-founders are serial technology entrepreneurs with multiple prior successful ventures together. We are well-funded and backed by some of the worlds’ leading technology investors, having secured $154M ($90+M Series-B and $64M Series-A) in total funding to date. Ethernovia has been recognized in EE Times' prestigious list of the Top 100 Startups for 2025. Join Ethernovia’s team to make a lasting impact on the future of packet processor-centric networking solutions to support the real-time sensor, Physical AI, and control data demands of software-defined autonomy across vehicles, robots and intelligent machines. Come share in our success with pre-IPO shares, competitive compensation, and great benefits while growing your knowledge and career with world class talent. We are looking for talented engineers and leaders who have an entrepreneurial spirit and want to drive cutting edge designs from concept to silicon to the future of mobility.

Requirements

MS or PhD in Electrical Engineering or a related discipline
10+ years of experience in DSP/system architecture for high-speed communication systems
Deep expertise in digital communications theory including advanced, efficient and adaptive equalization and echo cancellation algorithms, CDR algorithms, phase noise characterization and loop dynamic analysis, channel modeling and nonlinear effects
Strong hands-on experience with system modeling tools (MATLAB, Simulink, Python, C++)
Solid understanding of mixed-signal design fundamentals, including ADC/DAC architectures, PLL behavior and phase noise analysis, channel and analog front-end modeling including non-idealities
Proven track record of driving complex systems from concept to silicon

Nice To Haves

Experience in designing high-speed IEEE 802.3 transceivers for automotive, robotics and data center applications over both optical and copper channels
Prior technical leadership or mentoring experience

Responsibilities

Define and own the DSP/system architecture for high-speed transceivers, balancing power, performance, and silicon area
Drive key architectural decisions across DSP, analog front-end, and system partitioning
Lead system-level trade-offs and provide technical direction across the organization
Develop and maintain high-fidelity system models of complete transceivers using MATLAB, Simulink, Python, and/or C++
Design, evaluate, and optimize advanced equalization techniques, including FFE, DFE and MLSD
Architect robust Clock and Data Recovery (CDR) solutions with wide frequency acquisition range and very low phase noise
Develop efficient and advance echo cancellation algorithms for full-duplex high-speed links optimizing for power and silicon area
Design adaptive DSP algorithms with strong focus on rate of convergence, robustness, and implementation efficiency
Develop channel model including nonlinear effects and complex noise sources
Translate system-level requirements into block-level specifications (AFE, ADC/DAC, PLL, DSP blocks, etc.)
Collaborate closely with analog, RTL, and physical design teams to ensure accurate and efficient implementation
Ensure alignment between algorithm models and hardware realization
Drive pre-silicon to post-silicon correlation, ensuring models accurately predict silicon behavior
Define and support silicon bring-up, characterization, and debugging
Establish lab validation methodologies and support compliance testing and performance benchmarking
Contribute to system-level bring-up and production ramp readiness