Lead Humanoid Robotics System Architect

IntelHillsboro, OR
Hybrid

About The Position

This role serves as the authoritative systems architect owning the end-to-end hierarchical stack for next-generation humanoid robots. Acting as the critical interface between large-scale vision-language-action (VLA) models and physical platforms, this senior leader defines hierarchical multi-system architecture requirements and drives the co-optimization of advanced AI models with physical hardware under tight power, thermal, latency, and memory-bandwidth constraints.

Requirements

  • 10+ years in complex cyber-physical systems, with 4-5 years specializing in robotics, autonomous systems, or high-performance edge AI platforms.
  • BS in Engineering, Computer Science, Math, or related field is required.
  • Proven ownership of architectures bridging high-level AI models with real-time hardware control.
  • Deep fluency in transformer inference constraints (quantization, action chunking, memory bandwidth walls) and real-time distributed systems (EtherCAT, zonal sensor pods, safety islands).
  • Exceptional technical communication with a track record of writing rigorous, quantitative system specs and driving alignment across diverse engineering domains.

Nice To Haves

  • Direct experience with humanoid robots/mobile manipulators
  • Hands-on exposure to VLA/foundation models (-series, Helix-class, GR00T, OpenVLA, or equivalent)
  • Expertise with robotics platforms (NVIDIA Jetson / IGX platforms, custom AI silicon, or both)
  • Battery/thermal budgeting for highly constrained systems.

Responsibilities

  • Own the canonical hierarchical control stack, including VLM/VLA systems, visuomotor policies, whole-body control, and distributed joint FOC loops.
  • Establish rate boundaries, latency budgets, action-chunking strategies, and select interconnect topologies (e.g., EtherCAT).
  • Drive co-optimization of large VLA/world models with compute silicon.
  • Define quantization, sparsity/MoE, context lengths, and reference deployment envelopes to align model workloads with silicon capabilities.
  • Perform first-principles sizing of FLOPs, sustained TOPS, and memory-bandwidth floors.
  • Select optimal compute platforms and design strategic splits of AI workloads between central compute nodes and remote sensor pods.
  • Author and maintain primary system-level specifications (compute, power, thermal, sensors, actuator networks, safety islands) and translate high-level product goals into actionable, quantitative requirements.
  • Guide evolution of relevant technology roadmaps from current baselines to future system concepts that would influence product definition.
  • Lead multi-disciplinary architecture reviews, key decisions, and subsystem design trades across ML research, controls, electrical, firmware, and mechanical teams.
  • Formulate and guide expert-led viability experiments.
  • Mentor senior engineers in system-level thinking, addressing critical hardware barriers like the memory and power walls, and represent the platform architecture with key external silicon and actuator partners.

Benefits

  • Competitive pay
  • Stock bonuses
  • Health benefits
  • Retirement benefits
  • Vacation
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