Layout/Mask Designer

Apple • Austin, TX

3d • Onsite

About The Position

Design complex custom layout for digital circuits in deep SubMicron CMOS technologies. Work with Layout lead and circuit designers to review and analyze floorplans of complex circuits. Responsible to run a complete set of layout design verification tools available and clean up megacells to match engineering specifications. Work with Layout lead and circuit design team to plan, schedule work and negotiate layout tradeoffs as needed. Interpret LVS, DRC and ERC report to find the fastest way to complete layouts. Utilize advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Utilize advanced layout techniques to come up with best-in-class PPA for critical designs. Work with design lead to review EMIR simulations and apply necessary fixes to achieve robust power delivery. Utilize automated P&R tools to speed up the layout execution of digital designs.

Requirements

• 2 years of experience with layout floor-planning, standard cell planning and hierarchical layout assembly to generate best PPA (power, performance and area) layouts
• 2 years of experience resolving issues with RC delay, electromigration, self-heating and cross capacitance.
• 2 years of experience recognizing failure prone layout structures, working with designers for the best approach to problems like shielding critical signals, analyzing DFM yields and LOD effects.
• 2 years of experience creating layouts with a robust PG grid using IR simulations tools
• 2 years of experience collaborating and communicating effectively with multi-functional teams to understand engineering spec and have on-time deliverables
• 2 years of experience interpreting CALIBRE DRC, ERC, LVS, and DFM reports to finish layout(s)
• 2 years of experience using CADENCE virtuoso layout design tools to draw layouts and increased productivity

Responsibilities

• Design complex custom layout for digital circuits in deep SubMicron CMOS technologies.
• Review and analyze floorplans of complex circuits.
• Run a complete set of layout design verification tools and clean up megacells to match engineering specifications.
• Plan, schedule work, and negotiate layout tradeoffs.
• Interpret LVS, DRC and ERC reports to find the fastest way to complete layouts.
• Utilize advanced CAD tools and mask design knowledge for layout corrections and robust physical design representation of circuits.
• Utilize advanced layout techniques to achieve best-in-class PPA for critical designs.
• Review EMIR simulations and apply necessary fixes to achieve robust power delivery.
• Utilize automated P&R tools to speed up the layout execution of digital designs.

What This Job Offers

• Job Type: Full-time
• Career Level: Mid Level