Intern - Digital IP Design Engineer, DRAM

Micron • Boise, ID

1d

About The Position

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever. At Micron Technology, we transform how the world uses information to enrich life for all. The DRAM IP Development (IPDEV) team develops critical digital IP solutions that enable next-generation AI, mobile, client, data center, and graphics memory products. Our team is responsible for delivering high-quality DRAM IPs that drive innovation, product performance, and development efficiency across Micron's memory portfolio. As a Senior or Graduate Engineering Intern in DRAM Circuit Design, you will work alongside experienced engineers to develop and validate digital IP circuits used in future DRAM products. This internship provides hands-on experience with RTL-to-GDS design methodologies, custom design and verification flows, silicon learning, and advanced semiconductor development processes. You will contribute to impactful engineering projects while gaining exposure to industry-standard EDA tools, multi-functional collaboration, and AI-enabled engineering workflows.

Requirements

• Currently pursuing a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Semiconductor Engineering, or a related STEM field.
• Completed coursework in CMOS Digital Circuits, SystemVerilog/UVM, and Static Timing Analysis (STA).
• Experience with at least one programming language such as Python, Perl, TCL, MATLAB, or equivalent.
• Demonstrated analytical and problem-solving skills through academic, research, or project experience.
• Effective written and verbal communication skills with the ability to work in a collaborative team environment.

Nice To Haves

• Experience with digital IC design, verification, or semiconductor development projects.
• Familiarity with RTL design, synthesis, timing closure, verification, and physical design concepts.
• Exposure to industry-standard EDA tools used for circuit simulation, verification, and implementation.
• Experience applying AI, Generative AI, AI Assistant tools, Agentic AI workflows, or Code Assist technologies to improve engineering processes and development efficiency.
• Previous research, internship, or project experience related to memory systems, semiconductor design, or VLSI development.

Responsibilities

• Support the design, development, and verification of digital IP circuits for next-generation DRAM products using RTL-to-GDS methodologies.
• Perform circuit analysis across process, voltage, and temperature (PVT) corners to evaluate performance, quality, and reliability.
• Develop automation scripts and leverage Agentic AI, AI-Assisted tools, or Code Assist solutions to improve engineering productivity and design quality.
• Collaborate with multi-functional engineering teams on design implementation, verification, and silicon validation activities.
• Present technical findings, project results, and recommendations to engineering leadership and key customers.

Benefits

• Choice of medical, dental and vision plans
• Benefit programs that help protect your income if you are unable to work due to illness or injury
• Paid family leave
• Robust paid time-off program
• Paid holidays

What This Job Offers

• Job Type: Full-time
• Career Level: Intern