IC Verification Engineer

Broadcom•San Jose, CA

1d•$121,900 - $195,000

About The Position

This role involves developing test plans for various features of Block/Core/SOC, writing functional coverage, and architecting scalable test benches using verification methodologies. The engineer will build pseudo-random tests, debug regression failures, analyze coverage gaps, and lead documentation of verification strategies. The position also requires driving improvements in verification quality and efficiency.

Requirements

Bachelor's degree in Electrical Engineering or related degree with 8+ years relevant experience or Master's degree in Electrical Engineering or related degree with 6+ years related experience
6+ years of experience in writing and debugging complex test benches
Deep understanding of all aspects of Verification from building Testbenches, developing Test plans and pseudo-random tests, Functional coverage.
Proficiency in System Verilog and Verification Methodologies like UVM/VMM/OVM
Exceptionally good command of Object-Oriented Programming principles.
A good understanding of a complex protocol like PCIe or other multi-layered protocol
Capability to work independently and deliver.

Nice To Haves

Knowledge of PCI Express protocol is desired

Responsibilities

Develop Test plans for all features for Block/Core/SOC and Write Functional coverage for these features.
Architect and develop scalable and re-usable test benches, using the framework of the verification methodology
Build pseudo-random tests to verify and get full Functional coverage
Debug Regression failures, analyze Functional Coverage gaps and improve tests to cover the gaps
Lead the documentation of verification strategy including Test plans, Verification Environment, pseudo-random tests, etc. Lead reviews with design/architecture.
Drive improvements in Verification in terms of quality and efficiency.